X24C01APG ICMIC [IC MICROSYSTEMS], X24C01APG Datasheet

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X24C01APG

Manufacturer Part Number
X24C01APG
Description
Serial E2PROM
Manufacturer
ICMIC [IC MICROSYSTEMS]
Datasheet
This X24C01A device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
1K
FEATURES
FUNCTIONAL DIAGRAM
© Xicor, 1991 Patents Pending
3841-1
2.7V to 5.5V Power Supply
Low Power CMOS
Internally Organized 128 x 8
Self Timed Write Cycle
2 Wire Serial Interface
Four Byte Page Write Operation
High Reliability
New Hardwire – Write Control Function
—Active Current Less Than 1 mA
—Standby Current Less Than 50 µA
—Typical Write Cycle Time of 5 ms
—Bidirectional Data Transfer Protocol
—Minimizes Total Write Time Per Byte
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
(8) V
(4) V
(7) WC
(5) SDA
(6) SCL
(3) A 2
(2) A 1
(1) A 0
CC
SS
SLAVE ADDRESS
START
LOGIC
+COMPARATOR
STOP
REGISTER
D
ACK
OUT
R/W
Serial E
X24C01A
LOAD
ADDRESS
COUNTER
WORD
CONTROL
LOGIC
1
2
PIN
PROM
INC
DESCRIPTION
The X24C01A is a CMOS 1024 bit serial E
internally organized 128 x 8. The X24C01A features a
serial interface and software protocol allowing operation on a
simple two wire bus. Three address inputs allow up
to eight devices to share a common two wire bus.
Xicor E
requiring extended endurance. Inherent data retention
is greater than 100 years. Available in an eight pin DIP and
SOIC package.
START CYCLE
2
PROMs are designed and tested for applications
XDEC
CK
Characteristics subject to change without notice
H.V. GENERATION
DATA REGISTER
ICmic
IC MICROSYSTEMS
& CONTROL
E
TIMING
2
YDEC
32x32
PROM
8
128 x 8 Bit
D
OUT
2
PROM,
3841 FHD F01
TM

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X24C01APG Summary of contents

Page 1

This X24C01A device has been acquired by IC MICROSYSTEMS from Xicor, Inc. 1K FEATURES • 2.7V to 5.5V Power Supply • Low Power CMOS —Active Current Less Than 1 mA —Standby Current Less Than 50 µA • Internally Organized 128 ...

Page 2

X24C01A PIN DESCRIPTIONS Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It ...

Page 3

X24C01A Figure 1. Data Validity SCL SDA Figure 2. Definition of Start and Stop SCL SDA Stop Condition All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is HIGH. ...

Page 4

... FHD F08 the next eight bits of data, again responding with an acknowledge. The master then terminates the transfer by generating a stop condition, at which time the X24C01A begins the internal write cycle to the nonvolatile memory. While the internal write cycle is in progress the X24C01A inputs. 2 inputs are disabled, and the device will not respond to any requests from the master ...

Page 5

X24C01A Page Write The X24C01A is capable of an four byte page write operation initiated in the same manner as the byte write operation, but instead of terminating the write cycle after the first data word is transferred, ...

Page 6

... X24C01A Random Read Random read operations allow the master to access any memory location in a random manner. Prior to issuing the slave address with the R/W bit set to one, the master must first perform a “dummy” write operation. The master issues issues the start condition, and the slave address followed by the word address read ...

Page 7

... The address counter for read operations increments all address bits, allowing the entire memory contents to be serially read during one operation. At the end of the address space (address 127), the counter “rolls over” to address 0 and the X24C01A continues to output data for each acknowledge received ...

Page 8

X24C01A ABSOLUTE MAXIMUM RATINGS* .................. –65°C to +135°C Temperature Under Bias Storage Temperature ....................... –65°C to +150°C Voltage on any Pin with ............................... –1.0V to +7V Respect D.C. Output Current ............................................ 5 mA Lead Temperature (Soldering, ............................. ...

Page 9

X24C01A A.C. CONDITIONS OF TEST Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels A.C. CHARACTERISTICS LIMITS (Over recommended operating conditions unless otherwise specified) Read & Write Cycle Limits Symbol f SCL Clock Frequency SCL T ...

Page 10

X24C01A WRITE CYCLE LIMITS Symbol Parameter t Write Cycle Time (6) WR The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, ...

Page 11

X24C01A PACKAGING INFORMATION 8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL 0.015 (0.38) MAX. TYP. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH ...

Page 12

X24C01A PACKAGING INFORMATION 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESIS IN MILLIMETERS) PIN 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) 0.010 (0.25) ...

Page 13

X24C01A ORDERING INFORMATION Device LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the ...

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