X24C01APG ICMIC [IC MICROSYSTEMS], X24C01APG Datasheet - Page 10

• Manufacturer Part Number: X24C01APG
• Description: Serial E2PROM
• Manufacturer: ICMIC [IC MICROSYSTEMS]

X24C01A
WRITE CYCLE LIMITS
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the write cycle, the X24C01A
Write Cycle Timing
Notes:(5) Typical values are for T
Guidelines for Calculating Typical Values of Bus
Pull-Up Resistors
SDA
SCL
Symbol
t
WR
(6) t
(6)
WR
requires to perform the internal write operation.
is the minimum cycle time from the system perspective when polling techniques are not used. It is the maximum time the device
120
100
40
20
80
60
0
0
MIN.
RESISTANCE
BUS CAPACITANCE (pF)
WORD n
20 40
8th BIT
R
R
MAX.
RESISTANCE
MIN
MAX
Write Cycle Time
Parameter
=
=
V
I
A
C
OL MIN
CC MAX
60
BUS
t
= 25°C and nominal supply voltage (5V).
R
80100120
=1.8KΟ
ACK
3841 FHD F16
CONDITION
STOP
Min.
10
bus interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave address.
SYMBOL TABLE
WAVEFORM
t
WR
Typ.
5
(5)
CONDITION
START
INPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
Max.
10
ADDRESS
X24C01A
OUTPUTS
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
3841 FHD F04
Units
ms
3841 PGM T10