AT17F040 ATMEL [ATMEL Corporation], AT17F040 Datasheet - Page 7
AT17F040
Manufacturer Part Number
AT17F040
Description
FPGA CONFIGURATION FLASH MEMORY
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT17F040.pdf
(19 pages)
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5.9
5.10
5.11
5.12
3039I–CNFG–2/05
A2
READY
SER_EN
V
CC
(1)
(1)
Device selection input, (when SER_EN Low). The input is used to enable (or chip select) the
device during programming (i.e., when SER_EN is Low). Refer to the AT17F Programming
Specification available on the Atmel web site for additional details.
Open collector reset state indicator. Driven Low during power-up reset, released when power-up
is complete. (recommended 4.7 k
The serial enable input must remain High during FPGA configuration operations. Bringing
SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications,
SER_EN should be tied to V
+3.3V (±10%).
Notes:
1. This pin has an internal 20 K pull-up resistor.
2. This pin has an internal 30 K pull-down resistor.
CC
.
pull-up on this pin if used).
AT17F040/080
7