LT3071EUFD LINER [Linear Technology], LT3071EUFD Datasheet - Page 4

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LT3071EUFD

Manufacturer Part Number
LT3071EUFD
Description
5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator with Analog Margining
Manufacturer
LINER [Linear Technology]
Datasheet

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LT3071
electricAl chArActeristics
PARAMETER
V
V
VIOC Output Current
V
V
V
V
V
V
Input Hysteresis (Both Thresholds),
V
Input Current High,
V
Input Current Low,
V
EN Pin Threshold
EN Pin Logic High Current
EN Pin Logic Low Current
V
V
(Notes 3, 4, 5)
Reference Voltage Noise
(REF/BYP Pin)
Output Voltage Noise
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3071 regulators are tested and specified under pulse load
conditions such that T
Performance at –40°C and 125°C is assured by design, characterization
and correlation with statistical process controls. The LT3071I is
guaranteed over the –40°C to 125°C operating junction temperature range.
The LT3071MP is 100% tested and guaranteed over the –55°C to 125°C
operating junction temperature range.
Note 3: To maintain proper performance and regulation, the BIAS supply
voltage must be higher than the IN supply voltage. For a given V
BIAS voltage must satisfy the following conditions: 2.2V ≤ V
and V
voltage is limited to 2.2V.
Note 4: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification does not apply
for all possible combinations of input voltage and output current. When
operating at maximum output current, limit the input voltage range to
V

temperature range, otherwise specifications are at T
otherwise noted.
BIAS
IN
IL
O2
IZ
O2
IH
O2
O2
O2
O2
BIAS
IN
IN
Input Threshold (Logic-0 State),
Input Range (Logic-Z State),
-V
Input Threshold (Logic-1 State),
Ripple Rejection
< V
, V
, V
, V
, V
, V
, V
Undervoltage Lockout
Ripple Rejection
OUT
BIAS
O1
O1
O1
O1
O1
O1
OUT
, V
, V
, V
, V
, V
, V
Servo Voltage by VIOC
≥ (1.25 • V
+ 500mV.
O0
O0
O0
O0
O0
O0
, MARGSEL, MARGTOL
, MARGSEL, MARGTOL
, MARGSEL, MARGTOL
, MARGSEL, MARGTOL
, MARGSEL, MARGTOL
, MARGSEL, MARGTOL
OUT
J
≅ T
+ 1V). For V
A
. The LT3071E is 100% tested at T
OUT
CONDITIONS
V
V
V
V
Input Falling
Input Rising
V
V
V
V
V
V
V
V
V
V
C
V
BW = 10Hz to 100kHz
≤ 0.95V, the minimum BIAS
BIAS
BIAS
IN
IN
IH
IL
OUT
OUT
EN
EN
BIAS
IN
BIAS
IN
REF/BYP
OUT
= 0V, V
= V
= V
= V
– V
– V
= V
= 0V
= Off to On
= On to Off
= 1V, I
Rising
Falling
= 2.5V, V
= V
OUT(NOMINAL)
OUT(NOMINAL)
BIAS
OUT
OUT
BIAS
= 10nF , BW = 10Hz to 100kHz
OUT
BIAS
= 300mV, I
= 300mV, I
= 2.5V, Current Flows Into Pin
= 2.5V
OUT
+ 1.5V
= 2.5V, Current Flows Out of Pin
RIPPLE
= 5A, C
AVG
BIAS
+ 150mV, Sourcing Out of the Pin
+ 450mV, Sinking Into the Pin
A
= 50mV
OUT
OUT
A
= 25°C. C
REF/BYP
= 25°C.
, V
OUT
≤ 3.6V
= 2.5A
= 2.5A
RIPPLE
, the
The
P-P
= 10nF , C
=0.5V
, f
l
OUT
RIPPLE
denotes the specifications which apply over the full operating
= 15µF (Note 9), V
P-P
OUT
Note 5: The LT3071 incorporates safe operating area protection circuitry.
Current limit decreases as the V
foldback starts at V
Characteristics for a graph of Current Limit vs V
current limit foldback feature is independent of the thermal shutdown
circuity.
Note 6: Dropout voltage, V
differential at a specified output current. In dropout, the output voltage
equals V
Note 7: GND pin current is tested with V
current source load. VIOC is a buffered output determined by the value of
V
the margining function.
Note 8: Reverse output current is tested with the IN pins grounded and the
OUT + SENSE pins forced to the rated output voltage. This is measured as
current into the OUT + SENSE pins.
Note 9: Frequency Compensation: The LT3071 must be frequency
compensated at its OUT pins with a minimum C
as a cluster of (15×) 1µF ceramic capacitors or as a graduated cluster
of 10µF/4.7µF/2.2µF ceramic capacitors of the same case size. Linear
Technology only recommends X5R or X7R dielectric capacitors.
= 120Hz,
, f
OUT
= 15µF ,
RIPPLE
as programmed by the V
IN
= 120Hz,
– V
DO
.
IN
IN
– V
= V
OUT
OUT
DO
l
l
l
l
l
l
l
l
l
l
l
l
l
l
> 500mV. See the Typical Performance
, is the minimum input to output voltage
+ 0.3V (Note 5), V
O2
IN
V
-V
BIAS
-V
O0
MIN
0.75
250
160
170
OUT
1.1
0.9
0.9
2.5
pins. VIOC’s output is independent of
– 0.25
voltage increases. Current limit
IN
= V
OUT(NOMINAL)
1.55
TYP
300
235
255
1.4
4.0
60
25
25
75
66
10
25
OUT
IN
– V
BIAS
of 15µF configured
OUT
V
BIAS
= 2.5V unless
MAX
voltage. The
0.25
350
310
340
2.1
1.7
1.4
6.5
0.1
40
40
+ 300mV and a
– 0.9
µV
µV
UNITS
3071f
RMS
RMS
mV
mV
µA
µA
µA
µA
µA
µA
dB
dB
V
V
V
V
V
V
V

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