DM9301F ETC [List of Unclassifed Manufacturers], DM9301F Datasheet - Page 10
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DM9301F
Manufacturer Part Number
DM9301F
Description
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
1.DM9301F.pdf
(22 pages)
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Part Number:
DM9301F
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ALLIANCE
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Functional Description
The DM9301 Fast Ethernet single-chip TX/FX media
converter, provides the functionality as specified in
IEEE802.3, integrates the complete 100BASE-TX and a
PECL optic module interface for 100Base-FX. The
DM9301 implements the PCS, PMA, and TP-PMD
sublayer functions, as defined by specification. The term
“X” will be used to describe the sections used in the fiber
PHY layer interface. The term “X” will be used to describe
the sections used in the twisted-pair PMD layer interface.
100BASE-FX to TX Operation
The block diagram in figure 1 provides an overview of the
functional blocks contained in the FX to TX media
converter interface.
The FX to TX interface includes the following functional
blocks:
10
PECLRXI +/-
FX PECL Receiver
FX Receiver Clock Recovery Module
FX NRZI to NRZ Converter
FX Serial to Parallel Converter
FX Code Group Alignment Monitor
TX Scrambler
TX Parallel to Serial Converter
TX NRZ to NRZI Converter
TX NRZI to MLT-3 Converter
TX MLT-3 Driver
OSC/XTAL
PECLSD
25M
RCVR
PECL
RCVR
FXSD
FX
CGM
CRM
RX
FX
NRZI
NRZ
FX
to
125M FXRXCLK
25M FXRXCLK
FX Serial
Parallel
to
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
FX Link
Monitor
Status
FX to TX Block Diagram
Alignment
FX Code-
Monitor
group
Figure 1
Scrambler
TX
FX PECL Receiver
The PECL receiver receives NRZI encoded, differential
Pseudo Emitter Coupled Logic level signal. The receiver
converts the receive signal into a single-ended NRZI
signal and presents this signal to the FX Clock Recovery
Module.
FX Receiver Clock Recovery Module
The FX Clock Recovery Module accepts NRZI data from
the PECL receiver. The FX Clock Recovery Module locks
onto the data stream, using a Phase Lock Loop (PLL) and
extracts the 125Mhz reference clock. The extracted and
synchronized clock and data are presented to the FX
NRZI to NRZ Decoder.
FX NRZI to NRZ Converter
The receive data stream is required to be NRZI encoded
for compatibility with the standards for 100Base- FX. This
conversion process must be reversed on the transmit end.
The FX NRZI to NRZ decoder, receives the NRZI
data stream from the FX Clock Recovery Module
and converts it to a NRZ data stream to be
presented to the FX Serial to Parallel conversion
block.
to Serial
Parallel
TX
NRZI
NRZ
TX
to
NRZI to
MLT-3
TX
Rise/Fall
MLT-3
Driver
Time
CTL
Version: DM9301-DS-F02
DM9301
TPTXO+/-
May 8, 2000
Final