HPC36004 NSC [National Semiconductor], HPC36004 Datasheet - Page 15

• Manufacturer Part Number: HPC36004
• Description: High-Performance microController
• Manufacturer: NSC [National Semiconductor]

Ports A
Operating Modes
To offer the user a variety of I O and expanded memory
options the HPC46064 and HPC46004 have four operating
modes The ROMless HPC46004 has one mode of opera-
tion The various modes of operation are determined by the
state of both the EXM pin and the EA bit in the PSW regis-
ter The state of the EXM pin determines whether on-chip
ROM will be accessed or external memory will be accessed
within the address range of the on-chip ROM The on-chip
ROM range of the HPC46064 is C000 to FFFF (16k bytes)
The HPC46004 has no on-chip ROM and is intended for use
with external memory for program storage A logic ‘‘0’’ state
on the EXM pin will cause the HPC device to address on-
chip ROM when the Program Counter (PC) contains ad-
dresses within the on-chip ROM address range A logic ‘‘1’’
state on the EXM pin will cause the HPC device to address
memory that is external to the HPC when the PC contains
on-chip ROM addresses The EXM pin should always be
pulled high (logic ‘‘1’’) on the HPC46004 because no on-
chip ROM is available The function of the EA bit is to deter-
mine the legal addressing range of the HPC device A logic
‘‘0’’ state in the EA bit of the PSW register does two
things addresses are limited to the on-chip ROM range
FIGURE 14 Structure of Port B Pins B10 B11 B12 and B15 (Pins with Bus Control Roles)
B
(Continued)
15
and on-chip RAM and Register range and the ‘‘illegal ad-
dress detection’’ feature of the WATCHDOG logic is en-
gaged A logic ‘‘1’’ in the EA bit enables accesses to be
made anywhere within the 64k byte address range and the
‘‘illegal address detection’’ feature of the WATCHDOG logic
is disabled The EA bit should be set to ‘‘1’’ by software
when using the HPC46004 to disable the ‘‘illegal address
detection’’ feature of WATCHDOG
All HPC devices can be used with external memory Exter-
nal memory may be any combination of RAM and ROM
Both 8-bit and 16-bit external data bus modes are available
Upon entering an operating mode in which external memory
is used port A becomes the Address Data bus Four pins of
port B become the control lines ALE RD WR and HBE The
High Byte Enable pin (HBE) is used in 16-bit mode to select
high order memory bytes The RD and WR signals are only
generated if the selected address is off-chip The 8-bit mode
is selected by pulling HBE high at reset If HBE is left float-
ing or connected to a memory device chip select at reset
the 16-bit mode is entered The following sections describe
the operating modes of the HPC46064 and HPC46004
Note The HPC devices use 16-bit words for stack memory Therefore
when using the 8-bit mode User’s Stack must be in internal RAM
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