LT3513 LINER [Linear Technology], LT3513 Datasheet - Page 11

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LT3513

Manufacturer Part Number
LT3513
Description
2MHz High Current 5-Output Regulator for TFT-LCD Panels
Manufacturer
LINER [Linear Technology]
Datasheet

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OPERATION
The LT3513 is a highly integrated power supply IC contain-
ing four separate switching regulators and a low dropout
linear regulator (LDO). Switching regulator 1 is a step-
down 2.5A regulator with inductor current sense and an
integrated boost Schottky diode. Switching regulator 2 can
be confi gured as a step-up or SEPIC converter and has a
1.2A switch. Switching regulator 3 consists of a step-up
regulator with a 0.25A switch as well as an integrated
Schottky diode. Switching regulator 4 is a negative regula-
tor with a switch current limit of 0.25A and an integrated
Schottky diode. Linear regulator 5 is capable of providing
8mA of current to the base of an external NPN transistor.
The regulators share common circuitry including input
source, voltage reference and master oscillator. Operation
can be best understood by referring to the Block Diagram
as shown in Figure 1.
If the RUN-SS1 pin is pulled to ground, the LT3513 is shut
down and draws 30μA from the input source tied to V
An internal 2μA current source charges the external soft-
start capacitor, generating a voltage ramp at this pin. If the
RUN-SS1 pin exceeds 0.6V, the internal bias circuits turn
on, including the internal regulator, reference and 2MHz
master oscillator. The master oscillator generates four
clock signals, one for each of the switching regulators.
Switching regulator 1 will only begin to operate when the
RUN-SS1 pin reaches 0.8V. Switcher 1 generates V
which must be tied to the BIAS pin. When BIAS reaches 2.8V,
the NPNs pulling down on the RUN-SS2 and RUN-SS3/4
pins turns off, allowing an internal 2μA current source
to charge the external capacitors tied to RUN-SS2 and
RUN-SS3/4 pins. When the voltage on RUN-SS2 reaches
0.8V, switcher 2 is enabled. Correspondingly, when the
voltage on RUN-SS3/4 reaches 0.8V, switchers 3 and 4
are enabled. AV
rate determined by the capacitors tied to the RUN-SS2 and
RUN-SS3/4 pins. When all four switching outputs reach
90% of their programmed voltages, the NPN pulling down
on the C
source will charge the external capacitor tied to the C
When the C
turns on, connecting V
four outputs dropping below 10% of their programmed
voltage, PanelProtect circuitry pulls the C
disabling V
T
pin will turn off, and an internal 20μA current
ON
T
pin reaches 1.1V, the output disconnect PNP
.
DD
, E3 and V
ON
to E3. In the event of any of the
OFF
will then begin rising at a
T
pin to GND,
LOGIC
T
pin.
IN
.
,
A power good comparator monitors AV
when FB2 is at or above 90% of its regulated value. The
output is an open-collector transistor that is off when the
output is out of regulation, allowing an external resistor
to pull the pin high. This pin can be used with a P-chan-
nel MOSFET that functions as an output disconnect for
AV
The four switchers are current mode regulators. Instead
of directly modulating the duty cycle of the power switch,
the feedback loop controls the peak current in the switch
during each cycle. Compared to voltage mode control, cur-
rent mode control improves loop dynamics and provides
cycle-by-cycle current limit.
Figure 2. LT3513 Power-Up Sequence. (Traces from Both Photos
are Synchnonized to the Same Trigger)
PGOOD 20V/DIV
RUN-SS 2V/DIV
I
I
DD
SS-234 2V/DIV
L4
L3
V
V
I
AV
V
L2
SS3/4
V
LOGIC
V
OFF
500mA/DIV
500mA/DIV
ON
V
E3
DD
.
500μA/DIV
I
CT
L1
10V/DIV
20V/DIV
20V/DIV
10V/DIV
2V/DIV
2V/DIV
5V/DIV
1A/DIV
(2a)
(2b)
5ms/DIV
5ms/DIV
DD
LT3513
and turns on
11
3513 F02b
3513 F02a
3513fa

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