LT3782EFE-PBF LINER [Linear Technology], LT3782EFE-PBF Datasheet - Page 11

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LT3782EFE-PBF

Manufacturer Part Number
LT3782EFE-PBF
Description
2-Phase Step-UP DC/DC Controller
Manufacturer
LINER [Linear Technology]
Datasheet
The Peak and Average Input Currents
The control circuit in the LT3782 measures the input current
by using a sense resistor in each MOSFET source, so the
output current needs to be refl ected back to the input in
order to dimension the power MOSFET properly. Based
on the fact that, ideally, the output power is equal to the
input power, the maximum average input current is:
The peak current is:
The maximum duty cycle, D
minimum V
Power Inductor Selection
In a boost circuit, a power inductor should be designed
to carry the maximum input DC current. The inductance
should be small enough to generate enough ripple current
to provide adequate signal to noise ratio to the LT3782.
An empirical starting of the inductor ripple current (per
phase) is about 40% of maximum DC current, which is
half of the input DC current in a 2-phase circuit:
where V
voltage and output current, respectively.
APPLICATIONS INFORMATION
ΔI
L
I
I
IN(MAX)
IN(PEAK)
≅ 40% •
IN
, V
=
=1.2 •
IN
OUT
I
1– D
OUT(MAX)
.
I
O(MAX)
and I
MAX
1– D
2V
I
O(MAX)
OUT
IN
• V
MAX
are the DC input voltage, output
OUT
MAX
= 20% •
, should be calculated at
I
OUT(MAX)
V
IN
• V
OUT
And the inductance is estimated to be:
where f
The saturation current level of inductor is estimated to
be:
Sense Resistor Selection
During the switch on-time, the control circuit limits the
maximum voltage drop across the sense resistor to about
60mV. The peak inductor current is therefore limited to
60mV/R. The relationship between the maximum load
current, duty cycle and the sense resistor R
Power MOSFET Selection
Important parameters for the power MOSFET include the
drain-to-source breakdown voltage (BV
voltage (V
to-source voltage, the gate-to-source and gate-to-drain
charges (Q
current (I
(R
TH(JC)
L =
I
R ≤ V
SAT
f
V
s
s
SENSE(MAX)
IN
and R
is the switching frequency per phase.
• ΔI
D(MAX)
ΔI
GS(TH)
2
• D
GS
L
L
+
and Q
TH(JA)
I
), the on-resistance (R
) and the MOSFET’s thermal resistances
IN
2
≅ 70% •
GD
).
1.2 •
, respectively), the maximum drain
1– D
I
O(MAX)
I
OUT(MAX)
MAX
2
V
IN(MIN)
DS(ON)
• V
DSS
OUT
), the threshold
LT3782
) versus gate-
SENSE
11
is:
3782ff

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