EMC12 ETC2 [List of Unclassifed Manufacturers], EMC12 Datasheet - Page 10

• Manufacturer Part Number: EMC12
• Description: Audio Interface for the EmPack System
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

where J
0x3, 0x1, 0x0, 0x8, 0xC, 0xE, 0xF}. Notice the sequence is circular. If, for example, the first mezzanine
sees a MODID of 0xE, then the second and third mezzanine will see 0xF, and 0x7 respectively. For
normal PIO, the base board always drives 0x7 on the MODID bits.
1.2.2.2 PIO Address Map
A mezzanine is selected in a PIO read/write operation if PIO_CS- is low, and the MODID matches the
address bits PIO_A[18-21]. Address bits PIO_A[14-17] select the resource on the mezzanine, and
PIO_A[1-5] select the register to be read or written. All PIO are 16-bit wide and PIO_A[0] is not
decoded.. Table 1-2 below shows the mezzanine PIO resource map.
See the CS4231A datasheet for register mapping of the CODEC and BROADCAST resources. Note:
Access to the BROADCAST resource is read only.
09 Jan 2006
n
If, for a particular mezzanine, MODID
then, for the mezzanine above it, MODID
is a number in a sequence generated by the 4-bit Johnson counter. The sequence used is {0x7,
PIO_A[1-5]
0x00 - 0x0D
0x0E - 0x11
0x12
0x13 - 0x1D
0x1E
0x1F
Table 1-3: Register Map For DSP Resources
Table 1-4: Register Map For TDM Resource
Access
Read/Write
Read/Write
Read/Write
Communication Automation Corporation
Table 1-2: PIO Resource Map
EMC12 Hardware Reference Manual
PIO_A[14-17]
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xa- 0xF
Register
See AT&T DSP32C Information Manual
Reserved
PDF-conditional PDR access (PDRW)
Reserved
PDF-conditional PDR2 access (PDR2W)
Reserved
n
= J
n+1
n
,
= J
Resource
CODEC 0
CODEC 1
CODEC 2
CODEC 3
CODEC 4
CODEC 5
BROADCAST
FIFO (TDM)
SYSTEM
DSP
Reserved
n+1
,
Location
DSP
FPGA
FPGA
1-6