TSI-2 AGERE [Agere Systems], TSI-2 Datasheet - Page 27
TSI-2
Manufacturer Part Number
TSI-2
Description
2k x 2k Time-Slot Interchanger
Manufacturer
AGERE [Agere Systems]
Datasheet
1.TSI-2.pdf
(61 pages)
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Data Sheet, Revision 3
September 21, 2005
Table 5-5. CHI 3-State Output Control
Control in the table below refers to bits [6:4] in
This only applies if bits 13 and 12 of the corresponding register in
page 50
*
Agere Systems Inc.
Parameter Control
Like edge is the reference edge (rising or falling) as defined by bit 0 in
t
t
t
20
21
22
16.384 Mbits/s
are set to 11.
8.192 Mbits/s
8.192 Mbits/s
16.384 MHz
8.192 MHz
CHICLK
8.192 MHz
CHICLK
CHICLK
TXD
TXD
TXD
000
001
010
011
000
001
010
011
100
101
110
111
After Previous Like Edge in 16 MHz
After Previous Like Edge in 16 MHz
After Previous Like Edge in 16 MHz
After Previous Like Edge in 16 MHz
After Previous Opposite Edge in 8 MHz
After Previous Opposite Edge in 8 MHz
After Previous Opposite Edge in 8 MHz
After Previous Opposite Edge in 8 MHz
After Previous Like Edge (8 MHz mode only)
After Previous Like Edge (8 MHz mode only)
After Previous Like Edge (8 MHz mode only)
After Previous Like Edge (8 MHz mode only)
t
20
Figure 5-15. CHI 3-State Output Control
t
Table 6-51 Transmit_CHI_Global_Configuration (Read/Write) on page
22
Reference Point
t
21
Table 6-51 Transmit_CHI_Global_Configuration (Read/Write) on page
Table 6-48 Transmit_CHI_Configuration (Read/Write) on
*
2k x 2k Time-Slot Interchanger
Min
105
111
50
44
38
32
50
44
38
32
99
93
Max
120
114
108
102
59
53
47
41
59
53
47
41
*
52.
Unit
TSI-2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
52.
27
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