RF6001_1 RFMD [RF Micro Devices], RF6001_1 Datasheet - Page 30
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RF6001_1
Manufacturer Part Number
RF6001_1
Description
FRACTIONAL-N RF SYNTHESIZER WITH MODULATOR AND DIGITAL IF FILTER
Manufacturer
RFMD [RF Micro Devices]
Datasheet
1.RF6001_1.pdf
(70 pages)
RF6001
Part of the POLARIS™ TOTAL RADIO™ Solution
A second GPRS mode exists in the RF6001. Setting GPRS_TX1 to zero (0), and GPRS_TX2 to one (1) activates this mode. In
this mode, the DAC is programmed to ramp down on the falling edge of TX_ST, and then ramp back up on the next rising edge
of TX_ST. The next power level will change state on the rising edge of TX_ST. This forces any phase discontinuities to occur at
minimum output power and this avoids any spectral purity issues. This is similar in operation to non-GPRS mode except that
new parameters are loaded during the previous burst, and that the TX_EN pin will not return low after a ramp down unless the
next power level programmed is zero.
To get one-eighth symbol time resolution (instead of full symbol resolution), MD_DLY2 may be used. MD_DLY2 is triggered
when TX_ST goes high between bursts. In FIFO mode, once TX_ST is deasserted and the current bit cycle clock completes, the
MD_DLY2 timer starts counting in one-eighth symbol resolution. During this time, the value stored in G_DEF will be sent to the
modulator. When the MD_DLY2 counter times out, the FIFO begins shifting out data again. Serial mode functions in the same
manner except the serial bit clock stops during MD_DLY2 and starts once the timer expires.
The diagram below shows this mode of operation.
Since the minimum guard time (center of last tail bit to center of first tail bit) can be as short as 32qst, the ramp time of 16qst
down and 16qst up would be marginally too long to fit the guard time. The SDI bit R1316B may be programmed high to shorten
the ramp to be 13qst long instead of 16qst long. In this case, the ramp starts with PAR3 and ends with PAR15. The pre pro-
grammed ramp accessed with RMPSEL=1 is particularly convenient for use with this compressed ramp mode.
The SDI bit R0816B, may be programmed high to shorten the ramp to 8qst instead of 16qst. In this case, the ramp starts with
PAR1 and will use every other entry in the ramp table ending with PAR15.
Two different ramp shapes can be selected by appropriately setting the RMPSEL bit. The default values of the PAR registers for
each RMPSEL setting are shown below. These defaults were chosen so that when used with the RF3146 power amplifier, the
GSM time-mask and transient spectrum due to switching conform to ETSI specifications. The defaults associated with
RMPSEL=0 should be used for EGSM band, and the defaults associated with RMPSEL=1 should be used for DCS/PCS bands.
User defined ramp shapes can be loaded into registers PAR0-PAR15, they must be scaled to start at 000h (0) and end at 3FFh
(1023) to work properly with the PA ramp system.
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TX_EN
TX_ST
Output
DAC
(SDI)
PAG
TXENU
DAC1
PAT
PAG(1)
RMPSEL=0
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
PAG*PAR[15]+DAC1
(GPRS_TX1=0, GPRS_TX2=1, R1316B=1)
RMPSEL=1
GPRS Mode 2
PAG(2)
PAG(3)=0
Rev A3 DS050929
TXEND