AT91SAM9261S-CJ ATMEL [ATMEL Corporation], AT91SAM9261S-CJ Datasheet - Page 12

• Manufacturer Part Number: AT91SAM9261S-CJ
• Description: AT91 ARM Thumb-based Microcontrollers
• Manufacturer: ATMEL [ATMEL Corporation]

6.2
6.3
6.4
6.5
12
Test Pin
Reset Pin
PIO Controller A, B and C Lines
Shutdown Logic Pins
AT91SAM9261S
The TST pin is used for manufacturing test purposes when asserted high. It integrates a perma-
nent pull-down resistor of about 15 kΩ to GNDBU, so that it can be left unconnected for normal
operations. Driving this line at a high level leads to unpredictable results.
NRST is an open-drain output integrating a non-programmable pull-up resistor. It can be driven
with voltage at up to VDDIOP. As the product integrates power-on reset cells, the NRST pin can
be left unconnected in case no reset from the system needs to be applied to the product.
The NRST pin integrates a permanent pull-up resistor of 100 kΩ minimum to VDDIOP.
The NRST signal is inserted in the Boundary Scan.
All the I/O lines PA0 to PA31, PB0 to PB31, and PC0 to PC31 integrate a programmable pull-up
resistor of 100 kΩ. Programming of this pull-up resistor is performed independently for each I/O
line through the PIO Controllers.
After reset, all the I/O lines default as inputs with pull-up resistors enabled, except those which
are multiplexed with the External Bus Interface signals that require to be enabled as Peripherals
at reset. This is explicitly indicated in the column “Reset State” of the PIO Controller multiplexing
tables.
The SHDN pin is an output only, driven by Shutdown Controller.
The pin WKUP is an input only. It can accept voltages only between 0V and VDDBU.
6242DS–ATARM–06-Jan-09