DSPIC30F6010 MICROCHIP [Microchip Technology], DSPIC30F6010 Datasheet - Page 209
![no-image](/images/no-image-200.jpg)
DSPIC30F6010
Manufacturer Part Number
DSPIC30F6010
Description
High-Performance Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.DSPIC30F6010.pdf
(218 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6010-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
DSPIC30F6010-20I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6010-20I/PF
Manufacturer:
MICROCHI
Quantity:
20 000
Company:
Part Number:
DSPIC30F6010-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6010-30I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
DSPIC30F6010A-20E/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
DSPIC30F6010A-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6010A-20E/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F6010A-20I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F6010A-20I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
DSPIC30F6010A-30I/
Manufacturer:
TI
Quantity:
7 880
Company:
Part Number:
DSPIC30F6010A-30I/PF
Manufacturer:
AD
Quantity:
2 100
INDEX
Numerics
10-bit High Speed A/D
10-Bit High Speed Analog-to-Digital (A/D)
Converter Module ............................................................. 127
16-bit Up/Down Position Counter Mode.............................. 80
8-Output PWM
A
AC Characteristics ............................................................ 175
AC Temperature and Voltage Specifications .................... 175
Address Generator Units .................................................... 31
Alternate 16-bit Timer/Counter............................................ 81
Alternate Vector Table ........................................................ 41
Assembler
Automatic Clock Stretch.................................................... 102
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 18
Bit-Reversed Addressing .................................................... 34
Block Diagrams
2004 Microchip Technology Inc.
A/D Acquisition Requirements .................................. 131
Aborting a Conversion .............................................. 130
ADCHS ..................................................................... 127
ADCON1 ................................................................... 127
ADCON2 ................................................................... 127
ADCON3 ................................................................... 127
ADCSSL.................................................................... 127
ADPCFG ................................................................... 127
Configuring Analog Port Pins.................................... 133
Connection Considerations....................................... 133
Conversion Operation ............................................... 129
Effects of a Reset...................................................... 132
Operation During CPU Idle Mode ............................. 132
Operation During CPU Sleep Mode.......................... 132
Output Formats ......................................................... 132
Power-down Modes .................................................. 132
Programming the Start of Conversion Trigger .......... 130
Register Map............................................................. 134
Result Buffer ............................................................. 129
Sampling Requirements............................................ 131
Selecting the Conversion Clock ................................ 130
Selecting the Conversion Sequence......................... 129
Count Direction Status ................................................ 80
Error Checking ............................................................ 80
Register Map............................................................... 94
Load Conditions ........................................................ 175
MPASM Assembler................................................... 157
During 10-bit Addressing (STREN = 1)..................... 102
During 7-bit Addressing (STREN = 1)....................... 102
Receive Mode ........................................................... 102
Transmit Mode .......................................................... 102
Requirements............................................................ 181
Timing Characteristics .............................................. 181
Example ...................................................................... 34
Implementation ........................................................... 34
Modifier Values (table) ................................................ 35
Sequence Table (16-Entry)......................................... 35
10-bit High Speed A/D Functional............................. 128
16-bit Timer1 Module .................................................. 58
16-bit Timer4............................................................... 68
16-bit Timer5............................................................... 68
32-bit Timer4/5............................................................ 67
Preliminary
BOR Characteristics ......................................................... 174
BOR. See Brown-out Reset
Brown-out Reset
Brown-out Reset (BOR).................................................... 135
C
C Compilers
CAN Module ..................................................................... 115
Center Aligned PWM .......................................................... 89
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 135
Complementary PWM Operation........................................ 89
Configuring Analog Port Pins.............................................. 54
Control Registers ................................................................ 44
Core Overview .................................................................... 11
Core Register Map.............................................................. 27
CPU Architecture Overview ................................................ 11
D
Data Access from Program Memory Using
Program Space Visibility..................................................... 22
CAN Buffers and Protocol Engine ............................ 116
Dedicated Port Structure ............................................ 53
DSP Engine ................................................................ 15
dsPIC30F6010.............................................................. 6
External Power-on Reset Circuit .............................. 143
I
Input Capture Mode.................................................... 71
Oscillator System...................................................... 137
Output Compare Mode ............................................... 75
PWM Module .............................................................. 86
Quadrature Encoder Interface .................................... 79
Reset System ........................................................... 141
Shared Port Structure................................................. 54
SPI.............................................................................. 96
SPI Master/Slave Connection..................................... 96
UART Receiver......................................................... 108
UART Transmitter..................................................... 107
Characteristics.......................................................... 173
Timing Requirements ............................................... 181
MPLAB C17.............................................................. 158
MPLAB C18.............................................................. 158
MPLAB C30.............................................................. 158
CAN1 Register Map.................................................. 122
CAN2 Register Map.................................................. 124
I/O Timing Characteristics ........................................ 199
I/O Timing Requirements.......................................... 199
Overview................................................................... 115
Characteristics.......................................................... 179
Requirements ........................................................... 179
Data EEPROM Block Erase ....................................... 50
Data EEPROM Block Write ........................................ 52
Data EEPROM Read.................................................. 49
Data EEPROM Word Erase ....................................... 50
Data EEPROM Word Write ........................................ 51
Erasing a Row of Program Memory ........................... 45
Initiating a Programming Sequence ........................... 46
Loading Write Latches................................................ 46
NVMADR .................................................................... 44
NVMADRU ................................................................. 44
NVMCON.................................................................... 44
NVMKEY .................................................................... 44
2
C ............................................................................ 100
dsPIC30F6010
DS70119D-page 207