DSPIC30F6011A MICROCHIP [Microchip Technology], DSPIC30F6011A Datasheet - Page 158
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DSPIC30F6011A
Manufacturer Part Number
DSPIC30F6011A
Description
High-Performance Digital Signal Controllers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.DSPIC30F6011A.pdf
(238 pages)
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dsPIC30F6011A/6012A/6013A/6014A
Concurrently, the POR time-out (T
time-out (T
Reset is released. If T
is being used, then a nominal delay of T
is
(T
The BOR status bit (RCON<1>) will be set to indicate
that a BOR has occurred. The BOR circuit, if enabled,
will continue to operate while in Sleep or Idle modes
and will reset the device should V
threshold voltage.
DS70143B-page 156
POR
applied.
+ T
FSCM
PWRT
The
).
) will be applied before the internal
total
PWRT
delay
= 0 and a crystal oscillator
DD
POR
in
fall below the BOR
) and the PWRT
this
FSCM
= 100 s
case
Preliminary
is
FIGURE 20-6:
Note:
Note 1: External Power-on Reset circuit is
2: R should be suitably chosen so as to
3: R1 should be suitably chosen so as to
Dedicated supervisory devices, such as
the MCP1XX and MCP8XX, may also be
used as an external Power-on Reset
circuit.
required only if the V
is too slow. The diode D helps discharge
the capacitor quickly when V
down.
make sure that the voltage drop across
R does not violate the device’s electrical
specification.
limit any current flowing into MCLR from
external capacitor C, in the event of
MCLR/V
trostatic Discharge (ESD) or Electrical
Overstress (EOS).
D
V
DD
R
C
PP
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
© 2005 Microchip Technology Inc.
pin breakdown due to Elec-
R1
DD
DD
dsPIC30F
MCLR
POWER-UP)
power-up slope
DD
powers
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