Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 170

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Z8F082A28100KIT

Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS024705-0405
OCD Serial Errors
Breakpoints
If the OCD receives a Serial Break (nine or more continuous bits Low) the Auto-Baud
Detector/Generator resets. Reconfigure the Auto-Baud Detector/Generator by sending
80H
The On-Chip Debugger can detect any of the following error conditions on the DBG pin:
When the OCD detects one of these errors, it aborts any command currently in progress,
transmits a four character long Serial Break back to the host, and resets the Auto-Baud
Detector/Generator. A Framing Error or Transmit Collision may be caused by the host
sending a Serial Break to the OCD. Because of the open-drain nature of the interface,
returning a Serial Break break back to the host only extends the length of the Serial Break
if the host releases the Serial Break early.
The host transmits a Serial Break on the
XP
resets the Auto-Baud Generator/Detector but does not reset the OCD Control register. A
Serial Break leaves the device in DEBUG mode if that is the current mode. The OCD is
held in Reset until the end of the Serial Break when the DBG pin returns High. Because of
the open-drain nature of the DBG pin, the host can send a Serial Break to the OCD even if
the OCD is transmitting a character.
Execution Breakpoints are generated using the BRK instruction (opcode
eZ8 CPU decodes a BRK instruction, it signals the On-Chip Debugger. If Breakpoints are
enabled, the OCD enters DEBUG mode and idles the eZ8 CPU. If Breakpoints are not
enabled, the OCD ignores the BRK signal and the
instruction.
Breakpoints in Flash Memory
The
byte in Flash memory. To implement a Breakpoint, write
address, overwriting the current instruction. To remove a Breakpoint, the corresponding
page of Flash memory must be erased and reprogrammed with the original data.
®
.
Serial Break (a minimum of nine continuous bits Low)
Framing Error (received
Transmit Collision (OCD and host simultaneous transmission detected by the OCD)
BRK
F08xA Series devices or when recovering from an error. A Serial Break from the host
instruction is opcode
P R E L I M I N A R Y
Stop
00H
bit is Low)
, which corresponds to the fully programmed state of a
DBG
pin when first connecting to the Z8 Encore!
BRK
Z8 Encore! XP
instruction operates as an NOP
00H
to the required break
Product Specification
®
00H
On-Chip Debugger
F08xA Series
). When the
152

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