Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 74

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Z8F082A28100KIT

Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
Interrupt Edge Select Register
Shared Interrupt Select Register
7
IES7
R/W
R/W
0
0
7
C1ENH—Port C1 Interrupt Request Enable High Bit
C0ENH—Port C0 Interrupt Request Enable High Bit
Reserved—Must be 0.
C3ENL—Port C3 Interrupt Request Enable Low Bit
C2ENL—Port C2 Interrupt Request Enable Low Bit
C1ENL—Port C1 Interrupt Request Enable Low Bit
C0ENL—Port C0 Interrupt Request Enable Low Bit
The Interrupt Edge Select (IRQES) register (Table 44) determines whether an interrupt is
generated for the rising edge or falling edge on the selected GPIO Port A or Port D input
pin.
IESx—Interrupt Edge Select x
0 = An interrupt request is generated on the falling edge of the PAx input or PDx.
1 = An interrupt request is generated on the rising edge of the PAx input PDx.
where x indicates the specific GPIO Port pin number (0 through 7).
The Shared Interrupt Select (IRQSS) register (Table 45) determines the source of the
PADxS interrupts. The Shared Interrupt Select register (Table 45) selects between Port A
and alternate sources for the individual interrupts.
6
IES6
Table 43. IRQ2 Enable Low Bit Register (IRQ2ENL)
R/W
R/W
Table 44. Interrupt Edge Select Register (IRQES)
0
6
0
Reserved
5
IES5
R/W
R/W
0
5
0
P R E L I M I N A R Y
4
IES4
R/W
R/W
0
0
4
FCDH
FC8H
3
C3ENL
IES3
R/W
R/W
0
3
0
2
Z8 Encore! XP
C2ENL
IES2
R/W
R/W
0
0
2
Product Specification
1
C1ENL
IES1
R/W
R/W
0
1
0
®
Interrupt Controller
F08xA Series
0
C0ENL
IES0
R/W
R/W
0
0
0
56

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