MC9S08AW8A FREESCALE [Freescale Semiconductor, Inc], MC9S08AW8A Datasheet - Page 99
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MC9S08AW8A
Manufacturer Part Number
MC9S08AW8A
Description
8-Bit HCS08 Central Processor Unit (CPU)
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S08AW8A.pdf
(344 pages)
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6.7.8
In addition to the I/O control, port D pins are controlled by the registers listed below.
Freescale Semiconductor
PTDPE[3:0]
PTDSE[3:0]
Bits 7 through 4 are reserved bits that must always be written to 0.
Bits 7 through 4 are reserved bits that must always be written to 0.
Reset
Reset
Field
Field
3:0
3:0
W
W
R
R
Port D Pin Control Registers (PTDPE, PTDSE, PTDDS)
Internal Pullup Enable for Port D Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTD pin. For port D pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port D bit n.
1 Internal pullup device enabled for port D bit n.
Output Slew Rate Control Enable for Port D Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTD pin. For port D pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port D bit n.
1 Output slew rate control enabled for port D bit n.
R
R
0
0
7
7
Figure 6-28. Output Slew Rate Control Enable for Port D (PTDSE)
Figure 6-27. Internal Pullup Enable for Port D (PTDPE)
R
R
0
0
6
6
Table 6-18. PTDPE Register Field Descriptions
Table 6-19. PTDSE Register Field Descriptions
MC9S08AC16 Series Data Sheet, Rev. 6
R
R
0
0
5
5
R
R
0
0
4
4
Description
Description
PTDPE3
PTDSE3
3
0
3
0
PTDPE2
PTDSE2
0
0
2
2
1
Chapter 6 Parallel Input/Output
PTDPE1
PTDSE1
1
0
0
1
1
PTDPE0
PTDSE0
0
0
0
0
99
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