MCF51QM128VHS FREESCALE [Freescale Semiconductor, Inc], MCF51QM128VHS Datasheet - Page 51

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MCF51QM128VHS

Manufacturer Part Number
MCF51QM128VHS
Description
MCF51QM128
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Freescale Semiconductor, Inc.
Num.
(CPOL
(CPOL
10
11
12
13
(OUTPUT)
2
3
4
5
6
7
8
9
NOTE: Not defined!
(INPUT)
SPSCK
SPSCK
(INPUT)
(INPUT)
(INPUT)
MOSI
MISO
SS
=
=
1)
0)
t
Symbol
WSPSCK
t
8
SPSCK
t
t
Lead
t
t
t
t
t
Lag
t
t
t
HO
RO
SU
t
dis
t
FO
HI
RI
FI
a
v
note
see
SPSCK period
Enable lead time
Enable lag time
Clock (SPSCK) high or low time
Data setup time (inputs)
Data hold time (inputs)
Slave access time
Slave MISO disable time
Data valid (after SPSCK edge)
Data hold time (outputs)
Rise time input
Fall time input
Rise time output
Fall time output
Description
3
6
MSB IN
Table 33. SPI slave mode timing (continued)
Figure 18. SPI slave mode timing (CPHA=0)
SLAVE MSB
7
MCF51QM128 Data Sheet, Rev. 6, 01/2012.
5
2
5
BIT 6 . . . 1
BIT 6 . . . 1
10
12
12
11
SLAVE LSB OUT
LSB IN
t
4 x t
BUS
19.5
Min.
1
1
0
0
BUS
- 30
13
13
11
4
t
BUS
Max.
t
t
BUS
BUS
27
25
- 25
NOTE
Communication interfaces
SEE
t
t
Unit
BUS
BUS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9
data active
from high-
Comment
impedanc
impedanc
Hold time
t
BUS
Time to
to high-
e state
e state
f
BUS
= 1/
51

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