EP7311-CB-C CIRRUS [Cirrus Logic], EP7311-CB-C Datasheet - Page 4

• Manufacturer Part Number: EP7311-CB-C
• Description: HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
• Manufacturer: CIRRUS [Cirrus Logic]

EP7311
High-Performance, Low-Power System on Chip
The second is the programmable 16- or 32-bit-wide
SDRAM interface that allows direct connection of up to
two banks of SDRAM, totaling 512 Mb. To assure the
lowest
supports self-refresh SDRAMs, which are placed in a
low-power state by the device when it enters the low-
power Standby State.
Digital Audio Capability
The EP7311 uses its powerful 32-bit RISC processing
engine to implement audio decompression algorithms in
software. The nature of the on-board RISC processor, and
the availability of efficient C-compilers and other
software development tools, ensures that a wide range of
audio decompression algorithms can easily be ported to
and run on the EP7311
Universal Asynchronous
Receiver/Transmitters (UARTs)
The EP7311 includes two 16550-type UARTs for RS-232
serial communications, both of which have two 16-byte
FIFOs for receiving and transmitting data. The UARTs
support bit rates up to 115.2 kbps. An IrDA SIR protocol
encoder/decoder can be optionally switched into the
4
SDCLK
SDCKE
nSDCS[1:0]
WRITE/nSDRAS
nMOE/nSDCAS
nMWE/nSDWE
A[27:15]/DRA[0:12]
A[14:13]/DRA[12:14]
PD[7:6]/SDQM[1:0]
SDQM[3:2]
D[31:0]
Note:
Pin Mnemonic
possible
1. Pins A[27:13] map to DRA[0:14] respectively.
balance the load for large memory systems.
2. Pins are multiplexed. See
Table C. SDRAM Interface Pin Assignments
(i.e. A[27}/DRA[0}, A[26}/DRA[1], etc.) This is to
more information.
(Note 2)
(Note 2)
(Note 1)
(Note 2)
(Note 2)
power
I/O
I/O
I/O
consumption,
O
O
O
O
O
O
O
O
O
Table S on page 8
SDRAM clock output
SDRAM clock enable output
SDRAM chip select out
SDRAM RAS signal output
SDRAM CAS control signal
SDRAM write enable control
signal
SDRAM address
SDRAM internal bank select
SDRAM byte lane mask
SDRAM byte lane mask
Data I/O
Pin Description
©
the
C opyright Cirrus Logic, Inc. 2003
for
(All Rights Reserved)
EP7311
RX/TX signals to/from UART 1 to enable these signals
to drive an infrared communication interface directly.
Multimedia Codec Port (MCP)
The Multimedia Codec Port provides access to an audio
codec, a telecom codec, a touchscreen interface, four
general purpose analog-to-digital converter inputs, and
ten programmable digital I/O lines.
TXD[1]
RXD[1]
CTS
DCD
DSR
TXD[2]
RXD[2]
LEDDRV
PHDIN
SIBCLK
SIBDOUT
SIBDIN
SIBSYNC
Table D. Universal Asynchronous Receiver/Transmitters Pin
Note:
Pin Mnemonic
Pin Mnemonic
See
multiplexes.
Table E. MCP Interface Pin Assignments
Table R on page 8
Assignments
I/O
O
O
O
I
I
I
I
I
I
I/O
O
O
O
for information on pin
I
UART 1 transmit
UART 1 receive
UART 1 clear to send
UART 1 data carrier detect
UART 1 data set ready
UART 2 transmit
UART 2 receive
Infrared LED drive output
Photo diode input
Serial bit clock
Serial data out
Serial data in
Sample clock
Pin Description
Pin Description
DS506PP1