M37733 MITSUBISHI [Mitsubishi Electric Semiconductor], M37733 Datasheet - Page 12

• Manufacturer Part Number: M37733
• Description: 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

• Wait bit
As shown in Figure 11, when the external memory area is accessed
with the processor mode register 0 (address 5E
cleared to “0”, the access time can be extended compared with no
wait (the wait bit is “1”).
The access time is extended in two ways and this is selected with bit
0 (wait selection bit) of processor mode register 1 (address 5F
When this bit is “1”, the access time is 1.5 times compared to that for
no wait. When this bit is “0”, the access time is twice compared to
that for no wait.
At reset, the wait bit and the wait selection bit are “0”.
The accessing of internal memory area is performed in no wait mode
regardless of the wait bit.
The processor modes are described below.
Fig. 10 External memory area for each processor mode
12
FFFFFF
The shaded area is the external memory area.
87F
00
80
Microprocessor
16
16
16
16
mode
SFR
RAM
FFFFFF
87F
80
C
2
A
Evaluation chip
16
16
16
16
16
16
mode
RAM
SFR
16
) bit 2 (wait bit)
16
).
___
Fig. 11 Relationship between wait bit, wait selection bit, and access time
(1) Microprocessor mode [10]
Microprocessor mode is entered by connecting the CNVss pin to Vcc
and starting from reset.
Signal
code read or data write term. When the internal memory area is read
or written,
selection bit (bit 6 of oscillation circuit control register 0) to “1”.
P0
P1
level of the BYTE pin.
When the BYTE pin level is “L”, P1
as an address output pin while
I/O pin while
data is ignored while
When the BYTE pin level is “H”, P1
as an address output pin.
When the BYTE pin level is “L”, P2
as an address output pin while
I/O pin while
data is ignored while
R/
write when it is “L”.
BHE
is accessed when it is “L”.
Therefore, two bytes at even and odd addresses are accessed
simultaneously if address A
ALE is an address latch enable signal used to latch the address signal
from a multiplexed signal of address and data. The latch is transparent
while ALE is “H” to let the address signal pass through and held
while ALE is “L”.
Wait bit “1”
(No wait)
Wait bit “0”
(Wait 1)
Wait bit “0”
(Wait 0)
_
W
0
0
/A
/A
is a byte high enable signal which indicates that an odd address
is a read /write signal which indicates a read when it is “H” and a
0
8
/D
_
E
to P0
8
is output from pin
_
to P1
E
Internal clock
_
E
_
E
can be fixed to “H” by setting the signal output disable
7
/A
is “L”. However, if an internal memory is read, external
is “L”. However, if an internal memory is read, external
Ai/Dj
E
Ai/Dj
E
ALE
Ai/Dj
E
ALE
ALE
7
7
/A
pins become address output pins.
15
/D
_
E
_
E
MITSUBISHI MICROCOMPUTERS
15
is “L”.
is “L”.
pins have two functions depending on the
16-BIT CMOS MICROCOMPUTER
0
_
E
is “L” and
and is “L” during the data/instruction
_
E
_
E
is “H” and as an even address data
0
is “H” and as an odd address data
0
0
Access time
/A
/A
/A
Address
Address
8
16
8
M37733S4BFP
Access time
/D
/D
Address
/D
Access time
8
___
BHE
8
0
Data
to P1
to P1
to P2
Data
is “L”.
Address
7
7
/A
/A
7
/A
Data
15
15
Address
23
Data
/D
/D
/D
15
15
7
pins function
pins function
pins function
Address
Data