X4043 INTERSIL [Intersil Corporation], X4043 Datasheet - Page 17
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X4043
Manufacturer Part Number
X4043
Description
CPU Supervisor with 4kbit EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
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CAPACITANCE (T
Notes: (4) This parameter is periodically sampled and not 100% tested.
EQUIVALENT A.C. LOAD CIRCUIT
A.C. CHARACTERISTICS (Over recommended operating conditions, unless otherwise specified)
Notes: (5) Typical values are for T
t
t
SU:WP
HD:WP
Symbol
t
t
t
t
t
SDA
Symbol
HD:STA
SU:DAT
HD:DAT
SU:STO
C
SU:STA
t
t
f
t
C
HIGH
LOW
t
SCL
t
BUF
Cb
OUT
t
AA
DH
t
t
IN
R
IN
F
(6) Cb = total capacitance of one bus line in pF.
(4)
(4)
SCL clock frequency
Pulse width suppression time at inputs
SCL LOW to SDA data out valid
Time the bus free before start of new transmission
Clock LOW time
Clock HIGH time
Start condition setup time
Start condition hold time
Data in setup time
Data in hold time
Stop condition setup time
Data output hold time
SDA and SCL rise time
SDA and SCL fall time
WP setup time
WP hold time
Capacitive load for each bus line
5V
Output capacitance (SDA, RESET/RESET)
Input capacitance (SCL, WP)
1533Ω
100pF
A
= 25°C, f = 1.0 MHz, V
For V
and I
17
A
OL
= 25°C and V
OL
= 0.4V
= 3 mA
Parameter
Parameter
RESET
CC
= 5.0V
CC
5V
4.6kΩ
100pF
= 5V)
X4043, X4045
A.C. TEST CONDITIONS
Input pulse levels
Input rise and fall times
Input and output timing levels
Output load
Max.
8
6
Min.
250
n/a
0.1
4.7
4.7
4.0
4.7
4.0
5.0
0.6
0.4
50
0
0
100kHz
Max.
1000
100
300
400
n/a
0.9
Unit
pF
pF
20 + .1Cb
20 + .1Cb
Min.
100
0.1
1.3
1.3
0.6
0.6
0.6
0.6
0.6
50
50
0
0
0
400kHz
0.1 V
10ns
0.5 V
Standard output load
Test Conditions
(6)
(6)
V
V
CC
CC
OUT
IN
Max.
400
300
300
400
0.9
to 0.9 V
= 0V
= 0V
March 16, 2006
CC
Unit
kHz
FN8118.2
pF
ns
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
µs
µs