X4045 INTERSIL [Intersil Corporation], X4045 Datasheet
X4045
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X4045 Summary of contents
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... All other trademarks mentioned are the property of their respective owners. X4043, X4045 4k, 512 x 8 Bit FN8118.2 interval, the device activates detection circuitry protects the CC falls below the minimum returns to CC RESET (X4043) RESET (X4045) Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved the trip ...
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... X4043M8I-2.7A ADF X4045M8I-2.7A X4043M8IZ-2.7A (Note) DAT X4045M8IZ-2.7A (Note) DBC X4043P-2.7A X4043P AN X4045P-2.7A X4043PZ-2.7A (Note) X4043P Z AN X4045PZ-2.7A (Note) X4043PI-2.7A X4043P AP X4045PI-2.7A X4043PIZ-2.7A (Note) X4043P Z AP X4045PIZ-2.7A (Note) 2 X4043, X4045 PART NUMBER PART V MARKING RANGE (V) X4045 AL 4.5-5.5 X4045 AM ADJ ADK X4045P AL X4045P Z AL ...
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... X4043, X4045 PART NUMBER PART V MARKING RANGE (V) X4045 F 2.7-5.5 X4045 Z F X4045 G X4045 Z G ADP DBF ADQ DBB X4045P F X4045P Z F X4045P G X4045P TEMP CC TRIP RANGE (V) RANGE (°C) 2.55-2 SOIC SOIC (Pb-free) - SOIC - SOIC (Pb-free) ...
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... RESET/RESET SDA 6 SCL X4043, X4045 PIN CONFIGURATION ™ Function No internal connections No internal connections Reset Output. RESET is an active LOW, open drain output which goes active whenever V falls below will remain active until V CC TRIP V for t ...
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... TRIP SCL SDA A0h 5 X4043, X4045 nonvolatile control bits in the status register determine the watchdog timer period. The microprocessor can change these watchdog bits, or they may be “locked” by tying the WP pin HIGH. Figure 1. Watchdog Restart SCL SDA ...
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... V (actual) to the original V TRIP This is your new V that should be applied to V TRIP and the whole sequence should be repeated again (see Figure 5). 6 X4043, X4045 C ASE Now if the V (desired), perform the reset sequence as described in the next section. The new (desired)). ...
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... Level Sequence (V TRIP SCL SDA A0h Figure 4. Sample V Reset Circuit TRIP 4.7K RESET V TRIP Adj. 7 X4043, X4045 > 3V 15-18V, WEL bit set 15-18V 03h Adjust Run X4043 ...
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... Prior to writing to the control register, the WEL and RWEL bits must be set using a two step process, with the whole sequence requiring 3 steps. See "Writing to the Control Register". 8 X4043, X4045 V Programming TRIP Desired No V < ...
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... X4043, X4045 WD1, WD0: Watchdog Timer Bits The bits WD1 and WD0 control the period of the watchdog timer. The options are shown below. WD1 RWEL WEL ...
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... If a write operation is selected, the device will respond with an acknowledge after the receipt of each subsequent eight bit word. The device 10 X4043, X4045 transfers, and provides the clock for both transmit and receive operations. Therefore, the devices in this fam- ily operate as slaves in all applications. ...
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... Word Address X4043, X4045 1 Operational Notes The device powers-up in the following state: – The device is in the low power standby state. – The WEL bit is set to ‘0’. In this state it is not possi- ble to write to the device. – SDA pin is the input mode. ...
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... As with the byte write opera- tion, all inputs are disabled until completion of the inter- nal write cycle. See Figure 11 for the address, acknowledge, and data transfer sequence. 12 X4043, X4045 S t Slave Byte a ...
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... Figure 14. Current Address Read Sequence Signals from the Master SDA Bus Signals from the Slave 13 X4043, X4045 Figure 13. Acknowledge Polling Sequence Byte Load Completed by Issuing STOP. Enter ACK Polling Issue START Issue Slave Address Byte (Read or Write) ...
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... C Signals from K the Slave 14 X4043, X4045 of the word address bytes, the master immediately issues another start condition and the slave address byte with the R/W bit set to one. This is followed by an acknowledge from the device and then by the eight bit word. The master terminates the read operation by not responding with an acknowledge and then issuing a stop condition ...
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... Communication to the device is inhibited as a result of a low voltage condition (V CC progress communication is terminated. – Block lock bits can protect sections of the memory array from write operations. 15 X4043, X4045 Symbol Table WAVEFORM < V )any in- TRIP INPUTS OUTPUTS ...
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... V max. are for reference only and are not tested X4043, X4045 COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; the functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied ...
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... HD:WP Cb Capacitive load for each bus line Notes: (5) Typical values are for T = 25°C and total capacitance of one bus line in pF. 17 X4043, X4045 = 5V) CC Parameter A.C. TEST CONDITIONS Input pulse levels 5V Input rise and fall times Input and output timing levels 4.6kΩ ...
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... the minimum cycle time to be allowed for any nonvolatile write by the user, unless acknowledge polling is used. 18 X4043, X4045 t t HIGH LOW ...
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... Watchdog time out period, WDO WD1 = 1, WD0 = 0 WD1 = 0, WD0 = 1 WD1 = 0, WD0 = 0 t Watchdog Time Restart pulse width RSP t Reset time out RST Notes: (8) This parameter is periodically sampled and not 100% tested. 19 X4043, X4045 t PURST t PURST t RPD Parameter RVALID V RVALID Min. ...
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... SCL SDA (4043) RESET Minimum Sequence to Reset WDT SCL SDA V Set/Reset Conditions TRIP (V TRIP t TSU WP t VPS SCL 0 SDA A0h Start 20 X4043, X4045 Start Clockin ( RSP < t WDO Start ) 01h* sets V TRIP 03h* resets V TRIP ...
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... Program Voltage Off time before next cycle VPO V Programming Voltage Set Voltage Range TRAN TRIP V V Set Voltage variation after programming (-40 to +85°C). tv TRIP t WP Program Voltage Setup time VPS 21 X4043, X4045 = 2.0-5.5V; Temperature = 25°C CC Description Min. Max. Unit 10 µs 10 µs 10 µs 10 µ ...
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... PACKAGING INFORMATION 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.050 (1.27) 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 22 X4043, X4045 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.004 (0.19) 0.010 (0.25) X 45° 0.0075 (0.19) 0.250" ...
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... PACKAGING INFORMATION 8-Lead Miniature Small Outline Gull Wing Package Type M 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.036 (0.91) 0.032 (0.81) 0.040 ± 0.002 (1.02 ± 0.05) 0.007 (0.18) 0.005 (0.13) 23 X4043, X4045 0.118 ± 0.002 (3.00 ± 0.05) 0.0256 (0.65) Typ. 0.118 ± 0.002 (3.00 ± 0.05) 0.030 (0.76) 0.0216 (0.55) 7° Typ. 0.008 (0.20) 0.004 (0.10) 0.150 (3.81) Ref. ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 24 X4043, X4045 8-Lead Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) ...