X40420 XICOR [Xicor Inc.], X40420 Datasheet - Page 4

• Manufacturer Part Number: X40420
• Description: Dual Voltage Monitor with Integrated CPU Supervisor and System Battery Switch
• Manufacturer: XICOR [Xicor Inc.]

X40420/X40421 – Preliminary
PRINCIPLES OF OPERATION
Power On Reset
Applying power to the X40420/21 activates a Power On
Reset Circuit that pulls the RESET/RESET pins active.
This signal provides several benefits.
– It prevents the system microprocessor from starting
– It prevents the processor from operating prior to sta-
– It allows time for an FPGA to download its configura-
– It prevents communication to the EEPROM, greatly
When V
for t
(X40421) and RESET (X40420) pin allowing the system
to begin operation.
Figure 1. Connecting a Manual Reset Push-Button
Manual Reset
By connecting a push-button directly from MR to
ground, the designer adds manual system reset capa-
bility. The MR pin is LOW while the push-button is
closed and RESET/RESET pin remains LOW for
t
thereafter. A weak pull up resistor is connected to the
MR pin.
Low Voltage V1 Monitoring
During operation, the X40420/21 monitors the V
level and asserts RESET if supply voltage falls below a
preset minimum V
the microprocessor from operating in a power fail or
brownout condition. The V1FAIL signal remains active
until the voltage drops below 1V. It also remains active
until V
REV 1.2.14 7/12/02
PURST
to operate with insufficient voltage.
bilization of the oscillator.
tion prior to initialization of the circuit.
reducing the likelihood of data corruption on power up.
PURST
System
Reset
CC
or till the push-button is released and for t
CC
returns and exceeds V
(selectable) the circuit releases the RESET
exceeds the device V
RESET
TRIP1
X40420/21
. The RESET signal prevents
MR
TRIP1
TRIP1
for
threshold value
t
PURST
Manual
Reset
.
PURST
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CC
Low Voltage V2 Monitoring
The X40420/21 also monitors a second voltage level
and asserts V2FAIL if the voltage falls below a preset
minimum V
with RESET to prevent the microprocessor from oper-
ating in a power fail or brownout condition or used to
interrupt the microprocessor with notification of an
impending power failure. The V2FAIL signal remains
active until the V
also remains active until V2MON returns and exceeds
V
V2MON voltage monitor is powered by V
and V
Figure 2. Two Uses of Multiple Voltage Monitoring
WATCHDOG TIMER
The Watchdog Timer circuit monitors the microproces-
sor activity by monitoring the SDA and SCL pins. A
standard read or write sequence to any slave address
byte restarts the watchdog timer and prevents the
WDO signal to go active. A minimum sequence to
reset the watchdog timer requires four microprocessor
instructions namely, a Start, Clock Low, Clock High and
Stop. The state of two nonvolatile control bits in the
Status Register determine the watchdog timer period.
The microprocessor can change these watchdog bits
by writing to the X40420/21 control register.
Notice: No external components required to monitor two voltages.
TRIP2
Unreg.
Supply
Resistors selected so 3V appears on V2MON when unregulated
BATT
Unreg.
Supply
.
go away, V2MON cannot be monitored.
TRIP2
R
R
Reg
Reg
3V
5V
. The V2FAIL signal is either ORed
CC
Characteristics subject to change without notice.
Reg
supply reaches 6V.
5V
drops below 1V (V
V
V2MON
CC
X40421
V2MON
V
RESET
V2FAIL
CC
X40420
RESET
V2FAIL
V
OUT
V
CC
OUT
OUT.
falling). It
System
Reset
If V
System
Reset
4 of 25
CC