X5168 INTERSIL [Intersil Corporation], X5168 Datasheet
X5168
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X5168 Summary of contents
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... All other trademarks mentioned are the property of their respective owners. X5168, X5169 (Replaces X25268, X25169) FN8130.1 Detection and Reset Assertion reset threshold voltage using ™ protection RESET/RESET X5168 = RESET X5169 = RESET | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved ...
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... X5169S8I* X5168S8IZ* X5168 Z I X5169S8IZ* X5168V14* X5168V X5169V14* X5168V14I* X5169V14I* X5168P-2.7A X5169P-2. X5169PZ-2.7A X5168PI-2.7A X5169PI-2. X5169PIZ-2.7A X5168S8-2.7A* X5168 AN X5169S8-2.7A X5168S8Z-2.7A* (Note) X5168 Z AN X5169S8Z-2.7A X5168S8I-2.7A X5169S8I-2.7A X5168S8IZ-2.7A X5168 Z AP X5169S8IZ-2.7A X5168V14-2.7A X5169V14-2.7A X5168V14I-2.7A* X5169VI14-2.7A X5168P-2.7 X5169P-2 X5169PZ-2.7 X5168PI-2.7 X5169PI-2 X5169PIZ-2.7 X5168S8-2.7* X5168 F X5169S8-2 ...
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... SCK RESET/ RESET 3-5,10- X5168, X5169 RESET/RESET NC 6 SCK Chip Select Input. CS HIGH, deselects the device and the SO output pin high impedance state. Unless a nonvolatile write cycle is underway, the device will be in the standby power mode ...
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... Principles of Operation Power-on Reset Application of power to the X5168, X5169 activates a power- on reset circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from starting to operate with insufficient voltage or prior to stabilization of the oscillator. When V ...
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... New V Applied = CC Old V Applied + Error CC Error ≥ Emax Emax = Maximum Desired Error FIGURE 3. V 4.7K V TRIP + Adj. Program 5 X5168, X5169 V Programming TRIP Execute Reset V TRIP Sequence Set Applied = CC CC Desired V TRIP Execute Set V TRIP Sequence Apply Decrement 10mV) ...
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... X 6 X5168, X5169 Write Enable Latch The device contains a write enable latch. This latch must be SET before a write operation is initiated. The WREN instruction will set the latch and the WRDI instruction will reset the latch (Figure 3). This latch is automatically reset upon a power-up condition and after the completion of a valid write cycle ...
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... SCK Instruction SI High Impedance SO 7 X5168, X5169 WP is LOW and WPEN bit programmed HIGH disables all status register write operations. In Circuit Programmable ROM Mode This mechanism protects the block lock and watchdog bits from inadvertent corruption. In the locked state (programmable ROM mode) the WP pin is LOW and the nonvolatile bit WPEN is “ ...
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... While the write is in progress following a status register or EEPROM sequence, the status register may be read to check the WIP bit. During this time the WIP bit will be high. 8 X5168, X5169 Operational Notes The device powers-up in the following state: • The device is in the low power standby state. ...
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... FIGURE 7. WRITE ENABLE LATCH SEQUENCE SCK Instruction SCK Data Byte X5168, X5169 Data Out MSB ...
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... High Impedance SO Symbol Table WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don’t Care: Changes Allowed N/A 10 X5168, X5169 Instruction FIGURE 9. STATUS REGISTER WRITE SEQUENCE OUTPUTS Will be ...
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... V min. and V max. are for reference only and are not tested This parameter is periodically sampled and not 100% tested. 11 X5168, X5169 Recommended Operating Conditions Temperature Range Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Industrial .-40°C to +85°C Supply Voltage Limits -2.7 or -2. 2.7V to 5.5V Blank or -4. 4.5V-5.5V ...
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... Data hold time H (3) t Input rise time RI (3) t Input fall time deselect time CS (4) t Write cycle time WC 12 X5168, X5169 A.C. Test Conditions CC Input pulse levels 5V Input rise and fall times Input and output timing level 4.6kΩ 30pF PARAMETER 10ns ...
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... CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile WC write cycle. Serial Output Timing CS SCK MSB Out ADDR SI LSB IN 13 X5168, X5169 PARAMETER t t CYC MSB–1 Out t ...
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... RESET Output Timing SYMBOL V Reset trip point voltage, X5168-4.5A, X5168-4.5A TRIP Reset trip point voltage, X5168, X5169 Reset trip point voltage, X5168-2.7A, X5169-2.7A Reset trip point voltage, X5168-2.7, X5169-2 hysteresis (HIGH to LOW vs. LOW to HIGH V TH TRIP t Power-up reset time out ...
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... TRIP V V Program variation after programming (0-75°C). (programmed at 25°C) tv TRIP V programming parameters are periodically sampled and are not 100% tested. TRIP 15 X5168, X5169 VP1 VPS t t VPS VPH t VPO V = 1.7-5.5V ...
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... Watchdog Timer Off ( -40C 25C Temp (°C) V vs. Temperature (programmed at 25°C) TRIP 5.025 5.000 4.975 3.525 3.500 3.475 2.525 2.500 2.475 0 25 Temperature 16 X5168, X5169 t ) PURST SB 205 = 5V) CC 200 195 190 = 5V) 185 CC 180 175 170 165 = 3V, 5V) CC 160 90C ...
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... Packaging Information Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 17 X5168, X5169 8-Lead Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) Pin 1 Index Pin 1 0.300 (7.62) Ref. Seating Plane 0.150 (3.81) ...
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... Packaging Information 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 18 X5168, X5169 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.250" 0.010 (0.25) FOOTPRINT 0 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 X5168, X5169 14-Lead Plastic, TSSOP, Package Type V .025 (.65) BSC .169 (4.3) ...