X4165 INTERSIL [Intersil Corporation], X4165 Datasheet

no-image

X4165

Manufacturer Part Number
X4165
Description
CPU Supervisor with 16K EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X4165P
Manufacturer:
Intersil
Quantity:
1 150
Part Number:
X4165P-2.7
Manufacturer:
Intersil
Quantity:
500
Part Number:
X4165PI
Manufacturer:
Intersil
Quantity:
485
Part Number:
X4165PI-2.7
Manufacturer:
Intersil
Quantity:
500
Part Number:
X4165S8-2.7
Manufacturer:
Intersil
Quantity:
1 100
CPU Supervisor with 16K EEPROM
FEATURES
• Selectable watchdog timer
• Low V
• Low power CMOS
• 16Kbits of EEPROM
• Built-in inadvertent write protection
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available Packages
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
—Four standard reset threshold voltages
—Adjust low V
—Reset signal valid to V
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog OFF
—3mA active current
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
—Power-up/power-down protection circuitry
—Block Lock (1, 2, 4, 8 pages, all, none)
—8 Ld SOIC
—8 Ld TSSOP
V
SDA
SCL
special programming sequence
CC
WP
S0
S1
CC
detection and reset assertion
CC
reset threshold voltage using
V
Reset logic
CC
®
Command
Decode &
Register
Control
Threshold
Data
Logic
1
CC
Watchdog Transition
= 1V
Data Sheet
Detector
V
TRIP
EEPROM Array
1-888-INTERSIL or 1-888-468-3774
Protect Logic
Register
+
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Status
-
DESCRIPTION
The X4163, X4165 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply Volt-
age Supervision, and Serial EEPROM Memory in one
package. This combination lowers system cost,
reduces board space requirements, and increases reli-
ability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time
RESET/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
The device’s low V
user’s system from low voltage conditions, resetting the
system when V
point. RESET/RESET is asserted until V
proper operating level and stabilizes. Four industry
standard V
sil’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
Power on and
Timer Reset
Low Voltage
out
Generation
Watchdog
Watchdog
All other trademarks mentioned are the property of their respective owners.
Timebase
Reset &
May 12, 2006
Reset
|
TRIP
Intersil (and design) is a registered trademark of Intersil Americas Inc.
interval,
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
CC
thresholds are available, however, Inter-
falls below the set minimum V
CC
detection circuitry protects the
the
X4163, X4165
device
16K, 2K x 8 Bit
RESET (X4163)
RESET (X4165)
activates
CC
FN8120.1
returns to
CC
the
trip

Related parts for X4165

X4165 Summary of contents

Page 1

... CC Reset logic DESCRIPTION The X4163, X4165 combines four popular functions, Power-on Reset Control, Watchdog Timer, Supply Volt- age Supervision, and Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reli- ability. Applying power to the device activates the power on reset circuit which holds RESET/RESET active for a period of time ...

Page 2

... RANGE V CC TRIP MARKING (V) RANGE (V) X4165 AL 4.5-5.5 4.5-4.75 X4165 Z AL X4165 AM X4165 Z AM 4165AL 4165AL Z 4165AM 4165AM Z X4165 F 2.7-5.5 2.55-2.7 X4165 Z F X4165 G X4165 Z G 4165F 4165F Z 4165G 4165G Z X4165 AN 2.7-5.5 2.85-3.0 X4165 Z AN X4165 AP X4165 Z AP 4165AN 2.7-5.5 2.85-3.0 4165AN Z 4165AP 4165AP Z TEMP PKG. RANGE (°C) PACKAGE DWG. # ...

Page 3

... X4165S8I X4163S8IZ X4163 Z I X4165S8IZ (Note) (Note) X4163V8 4163 X4165V8 X4163V8Z 4163 X4165V8Z (Note) 4165 (Note) X4163V8I 4163I X4165V8I X4163V8IZ 4163I Z X4165V8IZ (Note) (Note) *Add "-T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 4

... SDA 6 8 SCL X4163, X4165 SCL 5 SDA Device Select Input Device Select Input Reset Output. RESET/RESET is an active LOW/HIGH, open drain output which goes active whenever V falls below the minimum V CC active until V ...

Page 5

... These are discussed elsewhere in this document The TRIP V THRESHOLD RESET PROCEDURE CC The X4163, X4165 is shipped with a standard V threshold (V over normal operating and storage conditions. How- ever, in applications where the standard V exactly right higher precision is needed in the V TRIP adjusted. The procedure is described below, and uses the application of a nonvolatile control signal ...

Page 6

... A0h Figure 3. Sample V Reset Circuit TRIP 4.7K RESET V TRIP Adj. 6 X4163, X4165 Resetting the higher or This procedure is used to set the V TRIP voltage level. For example, if the current V and the new V be reset. When V thing less than 1.7V. This procedure must be used to TRIP set the voltage to a lower value ...

Page 7

... The state of the Control Register can be read at any time by performing a random read at address FFFFh. Only one byte is read by each register read operation. The X4163, X4165 resets itself after the first byte is New V Applied = CC Old V ...

Page 8

... X HIGH 0 HIGH 1 8 X4163, X4165 zeroes to the other bits of the control register. Once set, WEL remains set until either it is reset to 0 (by writing a “0” to the WEL bit and zeroes to the other bits of the control register) or until the part powers again ...

Page 9

... Figure 5. Valid Data Changes on the SDA Bus SCL SDA 9 X4163, X4165 – The RWEL bit cannot be reset without writing to the nonvolatile control bits in the control register, power cycling the device or attempting a write to a write protected block. To illustrate, a sequence of writes to the device con- sisting of [02H, 06H, 02H] will reset all of the nonvola- tile bits in the Control Register to 0 ...

Page 10

... Transmitter Data Output from Receiver Start 10 X4163, X4165 Start mitting eight bits. During the ninth clock cycle, the receiver will pull the SDA line LOW to acknowledge that it received the eight bits of data. Refer to Figure 7. The device will respond with an acknowledge after ...

Page 11

... Figure 9. Page Write Operation S t Signals from a the Master Slave r Address t SDA Bus Signals from the Slave 11 X4163, X4165 Slave Word Address Address Byte Page Write The device is capable of a page write operation initiated in the same manner as the byte write opera- tion ...

Page 12

... ACK will be returned. If the device has completed the write operation, an ACK will be returned and the host can then proceed with the read or write operation. Refer to the flow chart in Figure 11. 12 X4163, X4165 Address Pointer Address Ends Here 60 Addr = 8 Figure 11 ...

Page 13

... Figure 13. Random Address Read Sequence S Signals from t a Slave the Master r Address t SDA Bus Signals from the Slave 13 X4163, X4165 Slave r Address Random Read Random read operation allows the master to access any memory location in the array. Prior to issuing the Slave Address Byte with the R/W bit set to one, the master must first perform a “ ...

Page 14

... Data Data K (2) (1) X4163, X4165 Addressing S LAVE Following a start condition, the master must output a Slave Address Byte. This byte consists of several parts: – a device type identifier that is ‘1010’ to access the array. – one bits of ‘0’. – next two bits are the device address. ...

Page 15

... Figure 15. X4163, X4165 Addressing Device Identifier (X1) (X0 Operational Notes The device powers-up in the following state: – The device is in the low power standby state. – The WEL bit is set to ‘0’. In this state it is not possi- ble to write to the device. ...

Page 16

... Min. and V Max. are for reference only and are not tested X4163, X4165 COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied ...

Page 17

... Cb Capacitive load for each bus line Notes: (1) Typical values are for T = 25°C and total capacitance of one bus line in pF. 17 X4163, X4165 = 5V) CC Parameter A.C. TEST CONDITIONS Input pulse levels Input rise and fall times Input and output timing levels For ...

Page 18

... the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used. 18 X4163, X4165 t t HIGH LOW ...

Page 19

... RESET (X4163) RESET Output Timing Symbol V Reset Trip Point Voltage, X4163, X4165-4.5A TRIP Reset Trip Point Voltage, X4163, X4165 Reset Trip Point Voltage, X4163, X4165-2.7A Reset Trip Point Voltage, X4163, X4165-2.7 t Power-up Reset Time Out PURST ( Detect to Reset/Output RPD CC ...

Page 20

... Program Voltage repeatability (Successive program operations. Programmed tr TRIP at 25°C Program variation after programming (0-75°C). (Programmed at 25°C.) tv TRIP V programming parameters are periodically sampled and are not 100% tested. TRIP 20 X4163, X4165 Min. 100 450 1 100 V TRIP t TSU 00h 01h or 03h 00h ...

Page 21

... Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 21 X4163, X4165 D (N/2)+1 (N/2) H ...

Page 22

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 22 X4163, X4165 M8.173 8 LEAD THIN SHRINK NARROW BODY SMALL OUTLINE M ...

Related keywords