X46402V8-3.1 XICOR [Xicor Inc.], X46402V8-3.1 Datasheet

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X46402V8-3.1

Manufacturer Part Number
X46402V8-3.1
Description
Dual Voltage CPU Supervisor with 64K Password Protected EEPROM
Manufacturer
XICOR [Xicor Inc.]
Datasheet
Functional Diagram
64K
FEATURES
• Dual Voltage Detection and Reset Assertion
• Selectable Watchdog Timer
• Volatile Flag shows Watchdog/Low Voltage Reset
• 64kbit 2-wire Serial EEPROM
• Two 64-Byte OTP memory blocks
• Adjustable size Password Protected Array
• 8 count tamper counter for invalid passwords
• Operates at 2.5-3.7V
• 8L TSSOP package
9900-3003 5 1/11/00 CM
Preliminary Information
Xicor, Inc. 1994, 1995, 1996, 1998 Patents Pending
SDA
SCL
—Low Vcc Monitor
—Low V2MON Monitor
—Low Vcc Block of EEPROM Writes
—RESET Signal Valid down to Vcc=1V
—150ms, 450ms, 1s, 5s, 10s, 20s, 1min, OFF
—1MHz Serial Interface speed
—64-Byte Page Write Mode
—Requires 64-bit OTP password to write
—64 Bit Read and Write Array Passwords
—Non-password protected array area
WP
Dual Voltage CPU Supervisor with 64K Password Protected EEPROM
Password Logic
Command
Write Control
Decode
Control
Logic
and
(Vcc) Control Signal
Write Password Area
(64, 128, 256, 512,
2K, 4K, All, None)
No Password Area
Timing and Control
HV Generation
(Bytes)
OTP array 1
OTP array 2
Data Register
Passwords
Control
Y Decoder
X46402
1
DESCRIPTION
The X46402 combines several functions into one device.
The first is a dual voltage CPU supervisor plus 64Kbit
serial EEPROM memory with password protected write
and read operations. The size of the password protected
area is selectable by 3 control bits. A Write Protect (WP)
pin in conjunction with a WPEN bit provides hardware
OTP control of the configuration of the array. Password
protected areas require 64 bit read or write passwords
prior to access. The eighth illegal password entry
(regardless of the number of correct entries) sets an OTP
tamper bit. This bit is one of the 32 bits in the Device ID.
A secondary voltage monitor circuit activates a V2FAIL
pin when the secondary supply voltage drops below a
V2trip voltage. This circuit is primarily intended to detect
the immediate loss of the battery supply.
A low Vcc voltage detect circuit activates a RESET pin
when Vcc drops below a V
blocks read or write operations.
A watchdog timer with the time period controlled by three
bits provides several possible time out periods from
150ms to 1 minute.
POWER ON AND
LOW VOLTAGE
GENERATION
WATCHDOG
TIMER RESET
WATCHDOG
TIMEBASE
RESET &
RESET
Characteristics subject to change without notice
TRIP
-
-
+
+
voltage. This signal also
V
TRIP
V
2TRIP
RESET
V2FAIL
Vcc
V2MON

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X46402V8-3.1 Summary of contents

Page 1

Preliminary Information 64K Dual Voltage CPU Supervisor with 64K Password Protected EEPROM FEATURES • Dual Voltage Detection and Reset Assertion —Low Vcc Monitor —Low V2MON Monitor —Low Vcc Block of EEPROM Writes —RESET Signal Valid down to Vcc=1V • Selectable ...

Page 2

X46402 PACKAGE/PINOUTS 8L TSSOP SDA RESET PIN NAMES VSS Ground SDA Serial Data VCC Power SCL Serial Clock WP Write Protect V2MON Voltage monitor input RESET Low Voltage Detect ...

Page 3

X46402 Volt Reg OTP Mode Enabled Pin1 Vss V2MON WP SDA V2FAIL RESET Recommended Connection ARCHITECTURE Data Memory This 64kbit memory array can be partitioned into pass- word protected or non-password protected areas. When password protected, the contents are readable ...

Page 4

X46402 Password Protection Configuration Portions of the memory array may be “locked”. This area of memory is password protected and is defined by the bits BL2, BL1 and BL0. For these protected areas it is necessary to use a Read ...

Page 5

X46402 Figure 2. Set V Level Sequence (V TRIP TRIP RESET SCL SDA D8h Figure 3. Set V2 Level Sequence (V TRIP V2 TRIP V2MON RESET ...

Page 6

X46402 Figure 5. Reset V2 Level Sequence (Vcc > 3V, WEL is set.) TRIP V2 TRIP V2MON RESET SCL SDA D8h V AND V2MON THRESHOLD RESET PROCEDURE CC The X46402 is shipped ...

Page 7

X46402 New Vcc or V2MON applied = Old Vcc V2MON applied V /V2 Programming TRIP TRIP Execute Reset V /V2 TRIP TRIP Sequence Set Vcc = Vcc applied = Desired V OR TRIP Set V2MON = V2MON applied = Desired ...

Page 8

X46402 Figure 7. X46402 Device Operation (Non-Password Protected Areas) LOAD COMMAND BYTE LOAD 2 BYTE ADDRESS READ/WRITE DATA BYTES Twc OR DATA ACK POLLING Tamper Counter The X46402 contains a tamper counter. The entry of an invalid password increments the ...

Page 9

X46402 Figure 9. Definition of Start and Stop Conditions Acknowledge SCL SDA Start Condition Acknowledge is a software convention used to indicate successful data transfer. The transmitting device, either master or slave, will release the bus after transmitting eight bits. ...

Page 10

X46402 PROGRAM OPERATIONS Password Protected Array Programming The password protected memory array write or OTP write requires issuing an 8-bit Password Write command followed by the password, password ACK command, the address and then the data bytes transferred as illustrated ...

Page 11

X46402 ACK Polling Once a stop condition is issued to indicate the end of the host’s write sequence, the X46402 initiates the internal nonvolatile write cycle. In order to take advantage of the typical 5ms write cycle, ACK polling can ...

Page 12

X46402 Figure 12. Acknowledge Polling SCL 8th clk. of 8th pwd. byte SDA PASSWORD PROTECTED READ OPERATIONS Password protected read operations are initiated in the same manner as password protected write operations but with a different command code. Password Random ...

Page 13

X46402 No-Password Sequential Read The host can read sequentially within the un-protected area of the array after receiving the No-password Com- mand and an address within the unprotected address space. The data output is sequential, with the data from address ...

Page 14

X46402 Figure 15. Non-Password Protected Random Read No-Password COMMAND SDA S Figure 16. Non-Password Protected Sequential Read No-Password COMMAND SDA S Figure 17. Change Passwords COMMAND SDA S If ACK, then Password Matches ACK POLLING COMMAND S New Password 0 ...

Page 15

X46402 Note on Read/Write Operations 1FFFh 0000h Notes: Using a “password read” “password write” non-password protected area is acceptable, because the pass- word is received and accepted prior to an address transmission assumed that ...

Page 16

X46402 An easier way to determine that the password has been changed correctly is to read the ACK bit following the second writing of the new password. If the device returns an ACK, the password is good ACK ...

Page 17

X46402 Table 4. CAPACITANCE (T = +25° 1MHz Symbol (3) Output Capacitance (SDA) C OUT (3) Input Capacitance (WP, SCL Notes: (1) Must perform a stop command after a read command prior to ...

Page 18

X46402 RESET AC SPECIFICATIONS Nonvolatile Write Cycle Timing Symbol (1) Write Cycle Time t WC Notes the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal ...

Page 19

X46402 GUIDELINES FOR CALCULATING TYPICAL VALUES OF BUS PULL UP RESISTORS PMAX MIN Bus capacitance in pF POWER-UP AND POWER-DOWN TIMING RESET Output Timing V TRIP VCC 0 Volts t ...

Page 20

X46402 Symbol V RESET Trip Point Voltage TRIP V V2FAIL Trip Point Voltage 2TRIP V Hysteresis TRIP V TH (HIGH to LOW vs. LOW to HIGH V V Hysteresis 2TRIP V 2TA (HIGH to LOW vs. LOW to HIGH V ...

Page 21

X46402 RESET Output Timing Symbol Watchdog Timeout Period, WD2 = 0, WD1 = 1, WD0 = 0 WD2 = 0, WD1 = 0, WD0 = 1 WD2 = 0, WD1 = 0, WD0 = 0 t WDO WD2 = 1, ...

Page 22

X46402 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) 8-LEAD PLASTIC, TSSOP , PACKAGE TYPE V .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .114 (2.9) .122 (3.1) .047 (1.20) ...

Page 23

... C 1.7 -20 to 85°C 2 70° C 2.3 -20 to 85°C 23 Preliminary Information Part Number 0°C–70°C X46402V8-3.1 -20°C–85°C X46402V8E-3.1 0°C–70°C X46402V8-3.1A -20°C–85°C X46402V8E-3.1A 0°C–70°C X46402V8-2.9 -20°C–85°C X46402V8E-2.9 ...

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