XR16C2850CM48 EXAR [Exar Corporation], XR16C2850CM48 Datasheet - Page 18

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XR16C2850CM48

Manufacturer Part Number
XR16C2850CM48
Description
3.3V AND 5V DUART WITH 128-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet
Each of the UART channel in the 2850 has its own set
of configuration registers selected by address lines
3.0 UART INTERNAL REGISTERS
A2,A1,A0 A
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
1
1
1
1
0
0 0
0 1
0 0
0 1
0 1
1 0
1 1
0 0
0 1
1 0
1 1
1 1
1 1
0 0
0 1
1 0
0 0
0 1
1 0
1 1
0 0
DDRESSES
T
ABLE
RHR - Receive Holding Register
THR - Transmit Holding Register
DLL - Div Latch Low Byte
DLM - Div Latch High Byte
DREV - Device Revision Code
DVID - Device Identification Code
IER - Interrupt Enable Register
ISR - Interrupt Status Register
FCR - FIFO Control Register
LCR - Line Control Register
MCR - Modem Control Register
LSR - Line Status Register
Reserved
MSR - Modem Status Register
Reserved
SPR - Scratch Pad Register
FLVL - TX/RX FIFO Level Counter Register
EMSR - Enhanced Mode Select Register
TRG - TX/RX FIFO Trigger Level Reg
FC - TX/RX FIFO Level Counter Register
FCTR - Feature Control Reg
EFR - Enhanced Function Reg
Xon-1 - Xon Character 1
Xon-2 - Xon Character 2
Xoff-1 - Xoff Character 1
Xoff-2 - Xoff Character 2
7: UART CHANNEL A AND B UART INTERNAL REGISTERS
3.3V AND 5V DUART WITH 128-BYTE FIFO
16C550 C
R
EGISTER
E
NHANCED
OMPATIBLE
18
R
A0, A1 and A2 with CSA# or CSB# selecting the
channel. The complete register set is shown on
Table 7 and Table 8.
EGISTERS
R
EGISTERS
R
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Write-only
Read-only
Write-only
Read-only
Read-only
Write-only
Read-only
Write-only
Read-only
Write-only
Read-only
Write-only
Read-only
EAD
/W
RITE
LCR[7] = 1, LCR
LCR[7] = 1, LCR
LCR[7] = 0, FCTR[6] = 0
LCR[7] = 0, FCTR[6] = 1
DLL, DLM = 0x00,
LCR = 0xBF
LCR[7] = 0
C
LCR[7] = 0
LCR[7] = 0
OMMENTS
XR16C2850
REV. 2.0.0
0xBF
0xBF

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