XR16C2850IJ EXAR [Exar Corporation], XR16C2850IJ Datasheet - Page 20

• Manufacturer Part Number: XR16C2850IJ
• Description: 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
• Manufacturer: EXAR [Exar Corporation]

XR16C2850
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
The 2850 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 13
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held HIGH or mark condition while RTS# and DTR# are de-asserted, and CTS#,
DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held HIGH during loopback test else
upon exiting the loopback test the UART may detect and report a false “break” signal.
2.20
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
13. I
NTERNAL
Transmit Shift Register
Receive Shift Register
L
OOP
(RHR/FIFO)
(THR/FIFO)
B
ACK IN
C
RTS#
CTS#
DTR#
DSR#
OP2#
CD#
RI#
HANNELS
MCR bit-4=1
20
VCC
VCC
OP1#
VCC
VCC
A
AND
B
TXA/TXB
RXA/RXB
RTSA#/RTSB#
CTSA#/CTSB#
DTRA#/DTRB#
DSRA#/DSRB#
RIA#/RIB#
CDA#/CDB#
OP2A#/OP2B#
xr
REV. 2.1.3