PT7A4401CJ ETC [List of Unclassifed Manufacturers], PT7A4401CJ Datasheet
PT7A4401CJ
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PT7A4401CJ Summary of contents
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... Selectable 1.544MHz, 2.084MHz or 8kHz input reference signals • Operates in either Normal or Free-Run states • Enhanced in jitter and duty cycle comparing with PT7A4401B • Package: 28-pin PLCC (PT7A4401CJ) Applications • Synchronization and timing control for multitrunk T1 and E1 systems • ST-BUS clock and frame pulse sources ...
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Contents Features ............................................................................................................................................... 1 Applications ........................................................................................................................................ 1 Introduction ......................................................................................................................................... 1 Block Diagram .................................................................................................................................... 3 Pin Information ................................................................................................................................... 4 Pin Assignment .......................................................................................................................... 4 Pin Configuration ...................................................................................................................... 4 Pin Description .......................................................................................................................... 5 Functional Description ........................................................................................................................ 6 Overall Operation ...................................................................................................................... 6 States ...
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Block Diagram Figure 1. Block Digram Phase REF Detector Input Impairment Monitor OSCi Master Clock OSCo PT0108(09/02) PT7A4401C T1/E1 System Synchronizer V GND CC Limiter & DCO1 Loop Filter State DCO2 Machine Feedback Frequency Select MUX RST MS FS1 ...
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Pin Information Pin Assignment Table 1. Pin Assignment ...
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Pin Description Table 2. Pin Description ...
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Functional Description Overall Operation The PT7A4401C is a multitrunk synchronizer that provides the clock and frame signals for T1 and E1 primary rate digital transmission links. It basically consists of the Master Clock Circuit, Digital Phase- Locked Loop (DPLL), ...
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Table 3. Input Frequency Selection ...
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Applications Information Master Clock The PT7A4401C uses either an external clock source or an external crystal and a few passive components with its internal oscillator as the master timing source. In Free-Run State, the frequency tolerance of the PT7A4401C ...
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Reset Circuit A simple power-up reset circuit with about reset active (low) time is shown in Figure 5. Resistor R tion only. The reset time is not critical but should be greater than 300ns. Figure 5. ...
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Detailed Specifications Definitions of Critical Performance Specifications Intrinsic Jitter: Intrinsic jitter is the jitter produced by the synchronizing circuit measured by applying a reference signal with no jitter to the input of the device, and measuring its ...
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Absolute Maximum Ratings Storage Temperature ...................................................... -65 Ambient Temperature with Power Applied ...................... -40 Supply Voltage to Ground Potential (Inputs & V Supply Voltage to Ground Potential (Outputs & D/O Only) .. -0.3 to 7.0V DC Input Voltage .................................................................. ...
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DC Electrical and Power Supply Characteristics Table 6. DC Electrical and Power Supply Characteristics ...
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AC Electrical Characteristics Performance Table 7. Performance ...
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Voltage Levels for Timing Parameter Measurement Table 8. Voltage Levels for Timing Parameter Measurement ...
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Timing Characteristics Table 9. Timing Characteristics ...
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Table 9. Timing Characteristics (Continued ...
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Figure 9. Timing Information for PT7A4401C RE F 8kH 1.544M 2.048M Hz F8 Note: Input to output delay values are valid after a RST with no further state changes. Figure 10. Output Timing ...
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Intrinsic Jitter Unfiltered Table 10. Intrinsic Jitter Unfiltered ...
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C2 (2.048MHz) Instrinsic Jitter Filtered Table 12. C2 (2.048MHz) Instrinsic Jitter Filtered ...
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Input to 1.544MHz Output Jitter Transfer Table 14. 1.544MHz Input to 1.544MHz Output Jitter Transfer ...
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Input to 2.048MHz Output Jitter Transfer Table 15. 2.048MHz Input to 2.048MHz Output Jitter Transfer ...
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Input Jitter Tolerance Table 16. 8kHz Input Jitter Tolerance ...
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Input Jitter Tolerance Table 18. 2.048MHz Input Jitter Tolerance ...
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Notes: 1. Voltages are with respect to ground (GND) unless otherwise stated. 2. Supply voltage and operation temperature are as per Recommended Operating Conditions. 3. Timing parameters are as per AC Electrical Characteristics - Voltage Levels for Timing Parameter ...
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Mechanical Specifications Figure 11. 28-pin PLCC PT0108(09/02) PT7A4401C T1/E1 System Synchronizer 25 Data Sheet Ver:0 ...
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Ordering Information Table 20. Ordering Information ...
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Email: support@pti.com.cn China: No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China Tel: (86)-21-6485 0576 Asia Pacific: Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong Tel: (852)-2243 3660 U.S.A.: 2380 Bering Drive, San ...