WM8980CGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM8980CGEFL/RV Datasheet - Page 38

• Manufacturer Part Number: WM8980CGEFL/RV
• Description: Stereo CODEC with Speaker Driver and Video Buffer
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

WM8980
Figure 18 ALC Limiter Mode Operation
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LIMITER MODE
ALC LIMITER MODE INITIALISATION SEQUENCE
In limiter mode, the ALC will reduce peaks that go above the threshold level, but will not increase the
PGA gain beyond the starting level. The starting level is the PGA gain setting when the ALC is
enabled in limiter mode. If the ALC is started in limiter mode, this is the gain setting of the PGA at
start-up. If the ALC is switched into limiter mode after running in ALC mode, the starting gain will be
the gain at switchover. The diagram below shows an example of limiter mode.
In order to properly initialise the ALC function, the following sequence of register writes is required:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Enable INPPGAENL (R2[2] =1).
Set INPPGAVOLL to the required input PGA gain (R45[5:0]).
Enable analogue inputs (R44[2:0]) as required.
Disable INPPGAENL (R2[2] =0).
Set ALCMAXGAIN (R32[5:3]) and ALCMINGAIN (R32[2:0]) to the required level for operation.
Set ALCLVL (R33[3:0]) to the required level for operation.
Set R34 to 0x000.
Wait for 1ms to allow the input PGA gain to update by the limiter circuit.
Enable Limiter mode (R34[8]=1).
Wait for 1ms to allow the input PGA gain to update by the limiter circuit.
PP, Rev 3.8, May 2012
Pre-Production
38