WM9082 WOLFSON [Wolfson Microelectronics plc], WM9082 Datasheet

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WM9082

Manufacturer Part Number
WM9082
Description
PDM Input Mono 3W Class D Speaker Driver
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet

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Part Number:
WM9082ECSN/R
Manufacturer:
Wolfson
Quantity:
6 545
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WM9082ECSN/R
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WOLFSON
Quantity:
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WM9082ECSN/R
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DESCRIPTION
The WM9082 is a high-performance sigma-delta Class D
speaker driver. Audio input is supported using a stereo PDM
interface; clock and control-code detection circuitry supports
all of the audio and control functions via a 2-wire interface.
The digital audio interface provides excellent noise
immunity, eliminating traditional input-filtering components.
The flexible 2-wire interface minimises the PCB footprint and
simplifies software development.
The combined audio and control interface configuration is
ideal for enabling the WM9082 to be located close to the
speaker; this reduces the length of the output connections,
giving good EMC performance and removing the need for
output filter components.
The sigma-delta architecture provides good power efficiency
and improved EMI performance with respect to traditional
PWM Class D designs.
A first-order high-pass filter can be selected on the input
signal to remove DC offsets and help to prevent speaker
damage. Other features include a low-power mute state,
and output slew-rate control.
Short-circuit and thermal protection is provided.
The WM9082 is supplied in a 9-ball 1.56 x 1.46mm CSP
package, with 0.5mm ball pitch.
BLOCK DIAGRAM
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PDM Input Mono 3W Class D Speaker Driver
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FEATURES
APPLICATIONS
Sigma-Delta Class-D speaker driver
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Stereo PDM digital audio input
Supports 32kHz, 44.1kHz, 48kHz sample rates (128fs input)
Automatic Left/Right channel selection
First-order high pass filter (HPF)
RF noise suppression
Pop and click suppression
Programmable output slew rates for low EMI
Short-circuit and thermal protection
9-ball CSP package
Mobile Handsets
Portable Media Players (PMP)
Notebooks / Laptop computers
LCD televisions
92dB SNR - ‘A’ weighted
2.5W into 4 (5V supply, 1% THD)
1.3W into 4 (3.6V supply, 1% THD)
1.25W into 8 (5V supply, 1% THD)
650mW into 8 (3.6V supply, 1% THD
Copyright 2012 Wolfson Microelectronics plc
Production Data, August 2012, Rev 4.1
WM9082

Related parts for WM9082

WM9082 Summary of contents

Page 1

... DC offsets and help to prevent speaker damage. Other features include a low-power mute state, and output slew-rate control. Short-circuit and thermal protection is provided. The WM9082 is supplied in a 9-ball 1.56 x 1.46mm CSP package, with 0.5mm ball pitch. BLOCK DIAGRAM WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www ...

Page 2

... WM9082 DESCRIPTION ....................................................................................................... 1 FEATURES ............................................................................................................ 1 APPLICATIONS ..................................................................................................... 1 BLOCK DIAGRAM ................................................................................................ 1 TABLE OF CONTENTS ......................................................................................... 2 PIN CONFIGURATION .......................................................................................... 3 ORDERING INFORMATION .................................................................................. 3 PIN DESCRIPTION ................................................................................................ 3 ABSOLUTE MAXIMUM RATINGS ........................................................................ 4 RECOMMENDED OPERATING CONDITIONS ..................................................... 4 ELECTRICAL CHARACTERISTICS ..................................................................... 5 TERMINOLOGY ............................................................................................................... 6  TYPICAL PERFORMANCE ................................................................................... 7 SIGNAL TIMING REQUIREMENTS ...................................................................... 8 PDM AUDIO INTERFACE TIMING .................................................................................. 8  DEVICE DESCRIPTION ........................................................................................ 9 INTRODUCTION .............................................................................................................. 9  PDM AUDIO INTERFACE ................................................................................................ 9  ...

Page 3

... Production Data PIN CONFIGURATION The WM9082 is supplied in a 9-ball CSP format. The pin configuration is illustrated below, showing the top-down view from above the chip. ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE WM9082ECSN/R -40C to +85C Note: Reel quantity = 5,000 PIN DESCRIPTION PIN NO ...

Page 4

... WM9082 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process therefore generically susceptible to damage from excessive static voltages ...

Page 5

... P = 625mW SPKVDD = 3. 8 625mW SPKVDD = 3. 48kHz fs = 44.1kHz fs = 32kHz 0.7 x DVDD -0.9 ‘OFF’ state to ‘ON’ state (see Figure 3) ‘ON’ state to ‘OFF’ state (see Figure 3) WM9082 TYP MAX UNIT 92 dB V 66 RMS -70 dB 1.3 W 2.5 0.65 1.25  200 pF 70 ...

Page 6

... I SPKVDD ‘STANDBY’ state; CLK enabled; DATA input is repeated Control Code.) Shutdown current I DVDD (WM9082 in the OFF I SPKVDD state; CLK and DATA inputs disabled.) Note 1: Guaranteed by design; not production-tested. TERMINOLOGY 1. Signal-to-Noise Ratio (dB) – SNR is the difference in level between a full scale output signal and the device output noise with no signal applied, measured over a bandwidth of 20Hz to 20kHz ...

Page 7

... Typical speaker driver THD+N performance is shown below for 8Ω and 4Ω load conditions. Plots are shown for typical SPKVDD supply voltage conditions. (DVDD=1.8V in all cases.) THD+N vs. Output Power Load = 8Ω + 33µH 10.00 1.00 0.10 0.01 0.00 0.10 THD+N vs. Output Power Load = 4Ω + 33µH 10.00 1.00 0.10 0.01 0.00 0.10 w SPKVDD = 5.5V SPKVDD = 3.6V 1.00 Output Power (W) SPKVDD = 5.5V SPKVDD = 3.6V 1.00 Output Power (W) WM9082 PD, August 2012, Rev 4.1 7 ...

Page 8

... WM9082 SIGNAL TIMING REQUIREMENTS PDM AUDIO INTERFACE TIMING CLK (input) DATA (input) t LSU Test Conditions SPKVDD=3.6V, DVDD=1.8V, SPKGND=GND=0V, T PARAMETER PDM Audio Interface Timing CLK cycle time CLK pulse width high CLK pulse width low DATA set-up time to CLK rising edge (Left channel data) ...

Page 9

... EMI performance with respect to traditional PWM Class D designs. The Class D speaker driver is powered from SPKVDD in the range 3.2V to 5.5V. The driver can deliver 2.5W output into a 4Ω load. The WM9082 is suitable for positioning very close to the external loudspeaker. The differential (BTL) outputs can connect directly to the loudspeaker with no other external components required ...

Page 10

... The WM9082 can be controlled using specific data sequences, known as Control Codes, received over the PDM audio interface. Each Control Code is a “zero” code when decoded as audio data. Therefore, the Control Codes can be transmitted to the WM9082 in the form of silent audio data, but the codes will be recognised by the WM9082 as control instructions. ...

Page 11

... Production Data ID Code 1 Code 2 Code 3 Code 4 Code 5 Code 6 Code 7 Code 8 Code 9 Code 10 Table 2 WM9082 Page 1 Control Codes ID Code 1 Code 2 Code 3 Code 4 Code 5 Code 6 Code 7 Code 8 Code 9 Code 10 Table 3 WM9082 Page 2 Control Codes The output driver slew-rate control is configurable using the SR[1] and SR[0] bits. These fields are defined in Table 4 ...

Page 12

... The state transitions and operating modes are described below. INITIAL POWER-UP When a valid CLK signal is first detected on IN1 or IN2, the WM9082 powers up to the “STANDBY” state. The WM9082 will remain in this state until a “Start-up Event” is detected, or until the CLK signal is removed. CONFIGURATION EVENTS In the STANDBY state, the WM9082 can be configured (if required) using the Control Code sequences listed in Table 6 ...

Page 13

... Start-Up Control Code is detected. The WM9082 Start-Up is selected under any of the conditions described in Table 7. Each of these conditions results in a transition to the “ON” state. Note that, if SPKVDD > 4.3V, then it is recommended to start up the WM9082 using Code 10; this ensures that the device is optimally configured for the higher SPKVDD level. ...

Page 14

... Control Codes. SHUTDOWN EVENTS If the CLK input is not present at any time, this results in a transition to the “OFF” state. The WM9082 will remain in the “OFF” state until the CLK input restarts. ...

Page 15

... Production Data STATE TRANSITION DIAGRAM The WM9082 operating states and transitions are illustrated in Figure 3. Figure 3 State Transition Diagram w WM9082 PD, August 2012, Rev 4.1 15 ...

Page 16

... A power on reset circuit ensures correct start-up and shut-down when the DVDD supply rail is enabled or disabled. The WM9082 is held in the “OFF” state when there is no CLK signal detected on the IN1 or IN2 pins; the Shutdown current in the “OFF” state is noted in the “Electrical Characteristics” section. ...

Page 17

... As the Class D output is a sigma-delta modulated signal, the choice of speakers and tracking of signals is important for ensuring good performance and reducing EMI. The efficiency of the speaker drivers is affected by the series resistance between the WM9082 and the speaker (e.g. PCB track loss and inductor ESR) as shown in Figure 4. This resistance should be as low as possible to maximise efficiency ...

Page 18

... WM9082 Figure 4 Speaker Connection Losses The Class D output requires external filtering in order to recreate the audio signal. This may be implemented using a 2 internal inductance provides the required filter response filter should be used if the loudspeaker characteristics are unknown or unsuitable the length of the loudspeaker connection is likely to lead to EMI problems ...

Page 19

... Class D operation (up to and beyond the Class D switching frequency). The Class D outputs of the WM9082 operate at much higher frequencies than is recommended for most speakers; care should be taken to ensure that the cut-off frequency of the loudspeaker’s filtering is low enough to suppress the high frequency energy of the Class D switching and doing, to prevent speaker damage ...

Page 20

... CLASS D LOUDSPEAKER CONNECTION Long, exposed PCB tracks or connection wires will emit EMI. The distance between the WM9082 and the loudspeaker should therefore be kept as short as possible. Where speakers are connected to the PCB via a cable form recommended that a shielded twisted pair cable is used. The shield should be connected to the main system, with care taken to ensure ground loops are avoided ...

Page 21

... REPRESENTS THE BASIC SOLDER BALL GRID PITCH. 4. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. 5. FOLLOWS JEDEC DESIGN GUIDE MO-211-C. w 1.460 0.635mm BODY, 0.50 mm BALL PITCH X DETAIL CORNER 0.05 SOLDER BALL DETAIL 2 MAX NOTE 3 WM9082 DM085 TOP VIEW DETAIL 1 PD, August 2012, Rev 4.1 21 ...

Page 22

... WM9082 PACKAGE DIAGRAM FOR DEVICES MARKED JC5 ...

Page 23

... Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. ADDRESS: Wolfson Microelectronics plc 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w WM9082 Wolfson is PD, August 2012, Rev 4.1 23 ...

Page 24

... WM9082 REVISION HISTORY DATE REV 05/07/10 1.0 First Release 20/04/11 2.0 Product status updated to preliminary technical data 21/04/11 2.0 Updated pinout changing VREFC to DNC. All associated diagrams and tables also updated to reflect the change 28/04/11 2.0 PSRR typical electrical characteristics values added 03/05/11 2.0 In Description, removed ‘The recommended configuration requires only 3 external capacitors’ ...

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