WM9701ACFT/V WOLFSON [Wolfson Microelectronics plc], WM9701ACFT/V Datasheet
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WM9701ACFT/V
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WM9701ACFT/V Summary of contents
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... MONOOUT MUX MUTE STEREO DAC (6) BITCLK (10) SYNC SERIAL (8) SDATAIN I/F WM9701A (5) SDATAOUT (11) RESETB STEREO ADC (2) XTLIN OSC (3) XTLOUT Production Data datasheets contain final specifications current on publication date. Supply of products conforms to Wolfson Microelectronics’ Terms and Conditions. 2001 Wolfson Microelectronics Ltd WM9701A . ...
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... Operating temperature range Storage temperature Package body temperature (soldering 10 seconds) Package body temperature (soldering 2 minutes) Note: 1. The digital supply voltage (DVDD) must always be less than or equal to the analogue supply voltage (AVDD). WOLFSON MICROELECTRONICS LTD. ORDERING INFORMATION DEVICE WM9701ACFT LINEOUTR 35 LINEOUTL ...
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Production Data RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Analogue supply range Digital ground Analogue ground Difference DVSS to AVSS Analogue supply current Digital supply current Standby supply current (all PRs set) Analogue supply current Digital supply current Standby supply ...
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WM9701A Test Conditions: AVDD = 5V, GND = 0V, DVDD = 3.3V, GND = 0V, T DAC Circuit Specifications 48kHz Sampling SNR A-weighted (Note 1) Full scale output voltage THD Frequency response Transition band Stop band Out of band rejection ...
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Production Data SERIAL INTERFACE Test Conditions: AVDD = 5V, GND = 0V, DVDD = 3.3V, GND = 0V, T measurements are taken at 10% to 90% VDD, unless otherwise stated. All the following timing information is guaranteed, not tested. AC-LINK ...
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WM9701A WARM RESET BIT_CLK Figure 3 Warm Reset Timing SYNC active high pulse width SYNC inactive to BIT_CLK startup delay CLOCK SPECIFICATIONS BIT_CLK Figure 4 Clock Specifications (50pF External Load) Note: Worst case duty cycle restricted to 40/60. PARAMETER BIT_CLK ...
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Production Data DATA SETUP AND HOLD (50PF EXTERNAL LOAD) BIT_CLK SDATA_OUT /SDATA_IN Figure 5 Data Setup and Hold (50pF External Load) Note: Setup and hold time parameters for SDATA_IN are with respect to AC’97 Controller. PARAMETER Setup to falling edge ...
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WM9701A PIN DESCRIPTION PIN NAME DVDD1 Supply 1 2 XTLIN Digital input XTLOUT Digital output 3 4 DVSS1 Supply SDATAOUT Digital input 5 6 BITCLK Digital output DVSS2 Supply 7 8 SDATAIN Digital output DVDD2 Supply 9 10 SYNC Digital ...
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Production Data DEVICE DESCRIPTION INTRODUCTION WM9701A is fully compatible with Rev 1.03 of the AC’97 specification. WM9701A comprises a stereo 18-bit Codec, (that is, 2 ADCs and 2 DACs) plus a comprehensive analogue mixer with 4 sets of stereo inputs, ...
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WM9701A SLOT # OUTGOING STREAMS INCOMING STREAMS TAG PHASE Figure 7 AC’97 Standard Bi-directional Audio Frame BIT_CLK SDATA_OUT Figure 8 AC-link Audio Output Frame The data streams currently defined by the AC’97 specification include: PCM playback - 2 output slots ...
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Production Data SYNC remains high for a total duration of 16 BIT CLKs at the beginning of each audio frame. The portion of the audio frame where SYNC is high is defined as the “Tag Phase”. The remainder of the ...
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WM9701A SLOT 1: COMMAND ADDRESS PORT The command port is used to control features, and monitor status for WM9701A functions including, but not limited to, mixer settings, and power management (refer to the register section). The control interface architecture supports ...
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Production Data If a sample stream of resolution less than 20-bits is transferred, the AC’97 controller must stuff all trailing non-valid bit positions within this time slot with 0s. SLOT 5: OPTIONAL MODEM LINE CODEC Audio output frame slot 5 ...
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WM9701A SLOT 1: STATUS ADDRESS PORT The status port is used to monitor status for WM9701A functions including, but not limited to, mixer settings, and power management. Audio input frame slot 1 echoes the control register index, for historical reference, ...
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Production Data stream in the audio output frame. At this point in time it is assumed that all sources of audio input have also been neutralised. The AC’97 controller should also drive SYNC and SDATA_OUT low after programming WM9701A to ...
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WM9701A The ID decodes the capabilities of WM9701A based on the following: BIT ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID9 SE4....SE 0 Table 1 Reset Register Function Note that WM9701A defaults to indicate 18-bit compatibility. However, a ...
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Production Data Table 3 PC-beep Register Function ANALOGUE MIXER INPUT GAIN REGISTERS (INDEX 0CH - 18h) This controls the gain/attenuation for each of the analogue inputs. Each step corresponds to approximately 1.5dB. The MSB of the register ...
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WM9701A GENERAL PURPOSE REGISTER (INDEX 20h) This register is used to control several miscellaneous functions of the WM9701A. Below is a summary of each bit and its function. Only the MIX, MS and LPBK bits are supported by WM9701A. The ...
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Production Data PR0 PR1 PR2 PR3 PR4 PR5 PR6 PR7 Table 9 Power Down Control Register Function Figure 12 An Example of WM9701A Power Down/Power up Flow Figure 12 illustrates one example procedure complete power down of ...
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WM9701A Figure 13 WM9701A Power Down/Flow with Analogue Still Alive Figure 13 illustrates a state when all the mixers should work with the static volume settings that are contained in their associated registers. This is used when the user could ...
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Production Data SERIAL INTERFACE REGISTER MAP The following table shows the function and address of the various control bits that are loaded through the serial interface during write operations. Reg. Name D15 D14 D13 Num. 00h Reset X SE4 SE3 ...
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WM9701A RECOMMENDED EXTERNAL COMPONENTS MIXER INPUTS AC-LINK Notes C19 and C21 should be as close to WM9701A as possible. 2. AGND and DGND should be connected as close to WM9701A as possible. Figure 14 External Components Diagram ...
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Production Data RECOMMENDED EXTERNAL COMPONENTS VALUES COMPONENT SUGGESTED REFERENCE VALUE 10nF C5 to C17 470nF C18 1 F C19 0.1 F C20 10 F C21 0.1 F C22 10 F C23 to C25 10 F C26 and ...
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WM9701A PACKAGE DIMENSIONS FT: 48 PIN TQFP ( 1.4 mm Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 1.35 1. ...