TP2520_07 SUTEX [Supertex, Inc], TP2520_07 Datasheet

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TP2520_07

Manufacturer Part Number
TP2520_07
Description
P-Channel Enhancement Mode Vertical DMOS FETs
Manufacturer
SUTEX [Supertex, Inc]
Datasheet
Features
Applications
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Ordering Information
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Soldering temperature*
Absolute Maximum Ratings are those values beyond which damage to
the device may occur. Functional operation under these conditions is not
implied. Continuous operation of the device at the absolute rating level
may affect device reliability. All voltages are referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
Low threshold — -2.4V max.
High input impedance
Low input capacitance — 125pF max.
Fast switching speeds
Low ON-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N and P-channel devices
Logic level interfaces – ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
BV
DSS
-200
(V)
/BV
DGS
R
max
DS(ON)
(Ω)
12
P-Channel Enhancement Mode
Vertical DMOS FETs
V
max
-2.4
GS(th)
(V)
-55°C to +150°C
300°C
Value
BV
BV
±20V
-0.75
I
D(ON)
min
(A)
DGS
DSS
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coeffi cient inherent
in MOS devices. Characteristic of all MOS structures,
this device is free from thermal runaway and thermally-
induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching
speeds are desired.
Pin Confi guration
Product Marking
TP5CW
TO-243AA (SOT-89) (N8)
TO-243AA (SOT-89) (N8)
TO-243AA (SOT-89)
W = Code for week sealed
DRAIN
Package Option
TN2520N8-G
GATE
DRAIN
SOURCE
TP2520

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TP2520_07 Summary of contents

Page 1

Features ► Low threshold — -2.4V max. ► High input impedance ► Low input capacitance — 125pF max. ► Fast switching speeds ► Low ON-resistance ► Free from secondary breakdown ► Low input and output leakage ► Complementary N and ...

Page 2

Thermal Characteristics Package (continuous)* (mA) TO-243AA (SOT-89) -260 * I (continuous) is limited by max rated T D † Mounted on FR5 board, 25mm x 25mm x 1.57mm. Electrical Characteristics Symbol Parameter BV Drain-to-source breakdown voltage DSS V Gate threshold ...

Page 3

Typical Performance Curves Output Characteristics -2 -10V GS -2.0 -1.5 -1.0 -0 -10 - Transconductance vs. Drain Current 1 -25V DS 0.8 0 -55° 25°C A ...

Page 4

Typical Performance Curves BV Variation with Temperature DSS 1.1 1.0 0.9 - (°C) j Transfer Characteristics -2 -25V DS -2 -55°C A -1.5 -1.0 -0 (volts) GS Capacitance ...

Page 5

TO-243AA (SOT-89) Package Outline (N8) Symbol A b MIN 1.40 0.44 Dimensions NOM - - (mm) MAX 1.60 0.56 JEDEC Registration TO-243, Variation AA, Issue C, July 1986. Drawings not to scale. Doc.# DSFP - TP2520 A101507 b1 C ...

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