TN2124_07 SUTEX [Supertex, Inc], TN2124_07 Datasheet

TN2124_07

Manufacturer Part Number

TN2124_07

Description

N-Channel Enhancement-Mode Vertical DMOS FET

Manufacturer

SUTEX [Supertex, Inc]

Datasheet

1.TN2124_07.pdf (5 pages)

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Features

►

Applications

►

-G indicates package is RoHS compliant (‘Green’)

Absolute Maximum Ratings

Absolute Maximum Ratings are those values beyond which damage to the device

may occur. Functional operation under these conditions is not implied. Continuous

operation of the device at the absolute rating level may affect device reliability. All

voltages are referenced to device ground.

* Distance of 1.6mm from case for 10 seconds.

Ordering Information

Parameter

Drain-to-source voltage

Drain-to-gate voltage

Gate-to-source voltage

Operating and storage temperature

Soldering temperature*

Logic level interfaces – ideal for TTL and CMOS

Solid state relays

Battery operated systems

Photo voltaic drives

Analog switches

General purpose line drivers

Telecom switches

DSS

Free from secondary breakdown

Low power drive requirement

Ease of paralleling

Low C

Excellent thermal stability

Integral Source-Drain diode

High input impedance and high gain

Complementary N- and P-channel devices

240

(V)

/BV

ISS

DGS

and fast switching speeds

max

DS(ON)

(Ω)

max

2.0

GS(th)

(V)

N-Channel Enhancement-Mode

Vertical DMOS FET

TO-236AB (SOT-23)

Package Option

TN2124K1-G

-55

C to +150

300

Value

±20V

DGS

DSS

General Description

This

transistor utilizes a vertical DMOS structure and Supertex’s

well-proven,

combination produces a device with the power handling

capabilities of bipolar transistors and the high input impedance

and positive temperature coefﬁ cient inherent in MOS devices.

Characteristic of all MOS structures, this device is free

from thermal runaway and thermally-induced secondary

breakdown.

Supertex’s vertical DMOS FETs are ideally suited to a wide

range of switching and amplifying applications where very

low threshold voltage, high breakdown voltage, high input

impedance, low input capacitance, and fast switching speeds

are desired.

Pin Conﬁ guration

Product Marking

low

N1CW

threshold,

silicon-gate

TO-236AB (SOT-23) (K1)

DRAIN

W = Code for week sealed

enhancement-mode

manufacturing

GATE

SOURCE

process.

TN2124

(normally-off)

This

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TN2124_07 Summary of contents

Page 1

N-Channel Enhancement-Mode Vertical DMOS FET Features ► Free from secondary breakdown ► Low power drive requirement ► Ease of paralleling ► Low C and fast switching speeds ISS ► Excellent thermal stability ► Integral Source-Drain diode ► High input impedance ...

Page 2

Thermal Characteristics Package (continuous) TO-236AB (SOT-23) (K1) Notes (continuous) is limited by max rated T D Electrical Characteristics Sym Parameter BV Drain-to-source breakdown voltage DSS V Gate threshold voltage GS(th) ΔV Change in V with temperature GS(th) GS(th) ...

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TN2124_07 SUTEX [Supertex, Inc], TN2124_07 Datasheet

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TN2124_07 Summary of contents

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