ADUM1100ARWZ AD [Analog Devices], ADUM1100ARWZ Datasheet - Page 5

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ADUM1100ARWZ

Manufacturer Part Number
ADUM1100ARWZ
Description
Manufacturer
AD [Analog Devices]
Datasheet
Figure 8 shows the model reduced for easier analysis
of circuit. The simplified schematic ignores negligible
effects of lead inductances and lumps C
puted element (Equation 1).
Using Figure 8, and ignoring inductances, C
as
The coupled voltage V
capacitor divider
Equation 2 shows that making C
C
of 4 kV and a bypass capacitance of 0.01 F, even the
moderate amount of 10 pF of stray capacitance would
create a coupled V
on top of the normal supply voltage, this would induce
latch-up. In such a situation the bypass capacitance
REV. 0
BP1
Figure 7. iCoupler in IEC 61000-4-5 SurgeTest Setup
Figure 8. Simplified Equivalent Circuit of Figure 7
C
V
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can minimize V
X
STRAY
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=
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V
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TEST
=
C4
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×
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+
C
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C
C
��
STRAY
DD1
X
BP2
BP2
C
���
. For example, with a test voltage
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STRAY
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voltage of 4 V. When imposed
X
×
+
+
C5
C5
is calculated using a simple
C
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BP1
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STRAY
i�������
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small compared to
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STRAY
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STRAY
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���
as a com-
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is given
(2)
(1)
–5–
C
voltage to 0.4 V—a much safer value. Do the following
for best results:
IEC 61000-4-4 Fast Transient and Burst Testing Example
Fast transient and burst testing per IEC 61000 - 4 - 4 is
another common system - level test that can cause
problems if good design practice is not followed. This
test couples high voltage fast edge signals onto system
ac mains.
Figure 9 shows a simplified circuit diagram of a fast
transient test setup. The main mechanism for problems
here is interwinding capacitance of the system power
supplies transformers. This stray capacitance can couple
fast transient signals from the ac mains to the iCoupler
supply pins. If the voltage impressed on the iCoupler
supplies is high enough, then maximum rated supply
voltages can be exceeded and latch-up is possible.
The best preventive measures in this example are:
BP1
Figure 9. IEC 61000-4-4 FastTransient/BurstTest Setup
RECOMMENDED SOLUTION
TRANSIENT ABSORBER
Minimize capacitances between iCoupler floating
grounds and system grounds.
Provide adequate bypassing with good quality
ceramic bypass capacitors with values large enough
to minimize the induced voltage at iCoupler
supply pins.
Ensure V
If possible add a 200  resistor in series with V
limit parasitic SCR trigger current.
Use a transient-absorbing Zener diode across V
Use low interwinding capacitance supplies.
Minimize supply noise by using adequate bypassing.
Use Zener diode clamps across the iCoupler supplies
to clamp noise voltages.
should be increased to 0.1 F to reduce the coupled
BOARD WITH
iCoupler
DD1
V
V
and V
DD1
DD2
SYSTEM POWER
COUPLED TRANSIENT NOISE
THROUGH C
V
DD2
C
DD1
TRANSFORMER
WINDING
CAPACITANCE
SUPPLIES
STRAY
are free from noise spikes.
OR V
DD2
STRAY
TO
GENERATOR
COUPLED TRANSIENT
NOISE ONTO AC LINE
EFT/BURST
COUPLING
NETWORK
AN-793
AC LINES
DD1
DD1
to
.

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