HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 22

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HT82A520R

Manufacturer Part Number
HT82A520R
Description
Full Speed USB 8-Bit OTP MCU with SPI
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
Interrupts
Interrupts are an important part of any microcontroller
system. When an external interrupt pin transition or an
internal function such as a Timer/Event Counter over-
flow, an USB interrupt, or transmission or reception of
SPI data occurs, their corresponding interrupt will en-
force a temporary suspension of the main program al-
lowing the microcontroller to direct attention to their
respective needs. Each device contains a single exter-
nal interrupt and several internal interrupts functions.
The external interrupt is controlled by the action of the
external interrupt pins, while the internal interrupts are
controlled by the Timer/Event Counter overflow, a USB
interrupt and SPI data transmission or reception.
Interrupt Registers
Overall interrupt control, which means interrupt enabling
and request flag setting, is controlled by the two inter-
rupt control registers, which are located in the Data
Memory. By controlling the appropriate enable bits in
these registers each individual interrupt can be enabled
or disabled. Also when an interrupt occurs, the corre-
sponding request flag will be set by the microcontroller.
The global enable flag if cleared to zero will disable all
interrupts.
Interrupt Operation
A USB interrupt, Timer/Event Counter overflow, 8-bits of
data transmission or reception on either of the one SPI
interfaces or an active edge on the external interrupt pin
will all generate an interrupt request by setting their
corresponding request flag, if their appropriate interrupt
enable bit is set. When this happens, the Program
Counter, which stores the address of the next instruction
Rev.1.00
Interrupt Structure
22
to be executed, will be transferred onto the stack. The
Program Counter will then be loaded with a new ad-
dress which will be the value of the corresponding inter-
rupt vector. The microcontroller will then fetch its next
instruction from this interrupt vector. The instruction at
this vector will usually be a JMP statement which will
jump to another section of program which is known as
the interrupt service routine. Here is located the code to
control the appropriate interrupt. The interrupt service
routine must be terminated with a RETI statement,
which retrieves the original Program Counter address
from the stack and allows the microcontroller to continue
with normal execution at the point where the interrupt
occurred.
The various interrupt enable bits, together with their as-
sociated request flags, are shown in the accompanying
diagram with their order of priority.
Once an interrupt subroutine is serviced, all the other in-
terrupts will be blocked, as the EMI bit will be cleared au-
tomatically. This will prevent any further interrupt nesting
from occurring. However, if other interrupt requests oc-
cur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be re-
corded. If an interrupt requires immediate servicing
while the program is already in another interrupt service
routine, the EMI bit should be set after entering the rou-
tine, to allow interrupt nesting. If the stack is full, the in-
terrupt request will not be acknowledged, even if the
related interrupt is enabled, until the Stack Pointer is
decremented. If immediate service is desired, the stack
must be prevented from becoming full.
HT82A520R/HT82A620R
October 23, 2009

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