HT82J97A_08 HOLTEK [Holtek Semiconductor Inc], HT82J97A_08 Datasheet - Page 24

• Manufacturer Part Number: HT82J97A_08
• Description: USB Joystick Encoder 8-Bit MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Clock Control Register SCC (Address 0X1C)
There is a system clock control register implemented to select the clock used in the MCU. This register consists of USB
clock control bit (USBCKEN), second suspend mode control bit (SUSPEND2) and system clock selection (SCLKSEL).
ADC Status and Control Register ADC (Address 0X1D)
The A/D converter implemented in the MCU is a 6-channel 8-bit A/D converter. The reference voltage (high reference
voltage and low reference voltage) can be selected as coming from external pins (PB6/VRL and PB7/VRH) or internal
power supplies of the MCU (VDD and VSS). The VRL and VRH are used to set the minimal and maximal boundaries of
the full-scale range of the A/D converter. If an analog input, VRL or VRH is not used for A/D conversion, it can also be
used as a general purpose I/O line. The ADSC (A/D converter status and control register) register is used to set the
configurations and A/D clock sources of the A/D converter and controls the operation of the A/D converter.
Rev. 1.60
Register
Register Bits
(0X1C)
(0X1D)
SCC
ADC
2~0 PFC2~PFC0
4~3 PFC4~PFC3
Bits
2~0
5
6
7
3
4
5
6
7
PF2~PF0
Labels
Labels
PFC5
PFC6
PFC7
PF3
PF4
PF5
PF6
PF7
Read/Write
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SUSPEND2
USBCKEN
SCLKSEL
PS2_flag
SEL_CLK
Option
SEL_CH
START
Option
ADON
EOCB
24
Reserved
USB clock control bit. When set to 1 , indicates a
USBCK ON, else USBCK OFF. Default value is 0 .
When set to 1 , enables a 7.5k resistor connected to
D-pin to 5V VDD. Default value is 0 .
Reserved
System clock 6MHz or 12MHz option, when working on
external oscillator mode. Default value is 0 .
0: Operating at external 12MHz mode
1: Operating at external 6MHz mode
Default value is 0 .
This flag is used to show that the MCU is in PS2 mode
(Bit=1). This bit is R/W by FW and will be cleared to zero
after power-on reset. The default is 0 .
These four bits selects one of the eight ADC channels
for conversion. Channels 0 to 5 correspond to inputs
AD0~AD5 on port pins PB0-PB5 respectively. Chan-
nels 6 and 7 are the ADC reference inputs VRH and
VRL, on port pins PB6 and PB7 respectively.
000: AD0 (PB0); 001: AD1 (PB1)
010: AD2 (PB2); 011: AD3 (PB3)
100: AD4 (PB4); 101: AD5 (PB5)
110: AD6 or VRL (PB6); 111: AD7 or VRH (PB7)
Default value is 000 B.
Selecting ADC operating clock.
00: 6MHz (Default clock)
01: 3MHz
10: 1.5MHz
11: 0.75MHz
Start of ADC conversion. High active. Default value is
Enable pin. ADON=1, Enable ADC block.
Default value is 0 .
End of conversion. This read-only status bit is cleared
when a conversion is completed, indicating that the
ADC Data Register contains a valid result.
0
Functions
HT82J97E/HT82J97A
Functions
December 23, 2008