F25L04UA-100PG ESMT [Elite Semiconductor Memory Technology Inc.], F25L04UA-100PG Datasheet - Page 3

• Manufacturer Part Number: F25L04UA-100PG
• Description: 3V Only 4 Mbit Serial Flash Memory
• Manufacturer: ESMT [Elite Semiconductor Memory Technology Inc.]

ESMT
SECTOR STRUCTURE
Block Protection (BP1, BP0)
The Block-Protection (BP1, BP0) bits define the size of the
memory area, as defined in Table2 to be software protected
against any memory Write (Program or Erase) operations. The
Write-Status-Register (WRSR) instruction is used to program the
BP1 and BP0 bits as long as
Block-Protection-Look (BPL) bit is 0. Chip-Erase can only be
executed if Block-Protection bits are both 0. After power-up, BP1
and BP0 are set to1.
Elite Semiconductor Memory Technology Inc.
Symbol
11
10
1(1/8 memory array)
2(1/4 memory array)
9
8
7
6
5
4
3
2
1
0
3(all memory array)
Protection Level
0
Sector Size
(Kbytes)
16KB
32KB
64KB
64KB
64KB
64KB
64KB
64KB
64KB
8KB
4KB
4KB
Table2 : F25L04UA Block Protection Table
Table1 : F25L04UA Sector Address Table
BP1
0
0
1
1
WP
7D000H – 7DFFFH
7C000H – 7CFFFH
7E000H – 7FFFFH
78000H – 7BFFFH
70000H – 77FFFH
60000H – 6FFFFH
50000H – 5FFFFH
40000H – 4FFFFH
30000H – 3FFFFH
20000H – 2FFFFH
10000H – 1FFFFH
00000H – 0FFFFH
Address range
is high or the
BP0
0
1
0
1
Protected Memory Area
Block Protection Lock-Down (BPL)
-Lock-Down (BPL) bit. When BPL is set to 1, it prevents any
further alteration of the BPL, BP1, and BP0 bits. When the WP
pin is driven high (V
“Don’t Care”. After power-up, the BPL bit is reset to 0.
WP
00000H –7FFFFH
70000H –7FFFFH
60000H –7FFFFH
A18 A17 A16
1
1
1
1
1
1
1
1
0
0
0
0
pin driven low (V
None
1
1
1
1
1
1
0
0
1
1
0
0
Sector Address
1
1
1
1
1
0
1
0
1
0
1
0
IH
A15
), the BPL bit has no effect and its value is
1
0
X
X
X
X
X
X
X
1
1
1
Publication Date: Jan. 2009
Revision:
A14
IL
X
1
1
1
0
X
X
X
X
X
X
X
), enables the Block-Protection
F25L04UA
A13
X
X
X
X
X
X
X
X
X
1
0
0
1.2
A12
X
X
X
X
X
X
X
X
X
X
1
0
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