F25L32PA-100PAG ESMT [Elite Semiconductor Memory Technology Inc.], F25L32PA-100PAG Datasheet - Page 18

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F25L32PA-100PAG

Manufacturer Part Number
F25L32PA-100PAG
Description
3V Only 32 Mbit Serial Flash Memory with Dual
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
F25L32PA-100PAG
Manufacturer:
NXP
Quantity:
32
ESMT
Mode Bit Reset
Mode bits [M
overhead for Fast Read Dual I/O operation. If [M
the next Fast Read Dual I/O instruction doesn’t need the
command code.
If the system controller is reset during operation, it will send a
standard instruction (such as Read ID) to the Flash memory.
Elite Semiconductor Memory Technology Inc.
Figure 16: Mode Bit Reset Instruction
7
SIO
SCK
SIO
–M
CE
Note: To reset mode bits during Dual I/O operation, sixteen clocks are needed to shift in command code “FFFFH”.
0
1
0
] are issued to further reduce instruction
MODE3
MODE0
0
1
2
3
FF
4
7
–M
5
0
] = “AxH”,
Mode bit Reset for Dual I/O
6
7
8
9
However, the device doesn’t have a hardware reset pin, so if
[M
instruction. After a system reset, it is recommended to issue a
Mode Bit Reset instruction first to release the status of [M
“AxH” and allow the device to recognize standard SPI instruction.
See Figure 16 for the Mode Bit Reset instruction.
7
10
–M
0
11
] = “AxH”, the device will not recognize any standard SPI
FF
12
13
14
15
Publication Date: Mar. 2009
Revision: 1.0
F25L32PA
7
18/36
–M
0
] =

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