HN58X24256AFPI RENESAS [Renesas Technology Corp], HN58X24256AFPI Datasheet - Page 11
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HN58X24256AFPI
Manufacturer Part Number
HN58X24256AFPI
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HN58X24256AFPI.pdf
(22 pages)
HN58X24256A
Device Addressing
The EEPROM device requires an 8-bit device address word following a start condition to enable the chip
for a read or a write operation. The device address word consists of 4-bit device code, 3-bit device address
code and 1-bit read/write(R/W) code. The most significant 4-bit of the device address word are used to
distinguish device type and this EEPROM uses “1010” fixed code. The device address word is followed
by the 3-bit device address code in the order of A2, A1, A0. The device address code selects one device
out of all devices which are connected to the bus. This means that the device is selected if the inputted 3-
bit device address code is equal to the corresponding hard-wired A2-A0 pin status. The eighth bit of the
device address word is the read/write(R/W) bit. A write operation is initiated if this bit is low and a read
operation is initiated if this bit is high. Upon a compare of the device address word, the EEPROM enters
the read or write operation after outputting the zero as an acknowledge. The EEPROM turns to a stand-by
state if the device code is not “1010” or device address code doesn’t coincide with status of the correspond
hard-wired device address pins A0 to A2.
Device Address Word
256k
Note:
Rev.0.01, Mar.22.2007, page 11 of 20
1. R/W=“1” is read and R/W = “0” is write.
Device address word (8-bit)
Device code (fixed)
1
0
1
0
Device address code
A2
A1
A0
R/W code*
R/W
1