HN58X24256AFPI RENESAS [Renesas Technology Corp], HN58X24256AFPI Datasheet - Page 8

• Manufacturer Part Number: HN58X24256AFPI
• Manufacturer: RENESAS [Renesas Technology Corp]

HN58X24256A
Device Address (A0, A1, A2)
Eight devices can be wired for one common data bus line as maximum. Device address pins are used to
distinguish each device and device address pins should be connected to V
code provided from SDA pin matches corresponding hard-wired device address pins A0 to A2, that one
device can be activated.
Pin Connections for A0 to A2
Memory size
256k bit
Note:
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
the following table. When the WP is low, write operation for all memory arrays are allowed. The read
operation is always activated irrespective of the WP pin status.
Write Protect Area
WP pin status
V
V
Rev.0.01, Mar.22.2007, page 8 of 20
IH
IL
1. “V
CC
Max connect
number
8
/V
SS
” means that device address pin should be connected to V
Pin connection
A2
V
Write protect area
256k bit
Upper 1/8 (32k bit)
Normal read/write operation
CC
/V
SS
A1
V
CC
/V
SS
A0
V
CC
/V
SS
Note
CC
or V
CC
or V
SS
. When device address
SS
.