ML6430 Micro Linear, ML6430 Datasheet

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... For more demanding applications, a two wire serial control bus is available for full control of all of the ML6430/ML6431 features. The ML6430/ML6431 are ideal for clock generation in MPEG encoders, high performance display timing, and video editing ...

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... ML6430/ML6431 PIN CONFIGURATION SLEEP/54MHz C VIN /H SYNC P2/S DATA SLEEP/54MHz C VIN /H SYNC 2 ML6430 32-Pin TQFP (H32- P2/S DATA 1 P3/S CLK GND REF 7 V SYNC TOP VIEW ML6431 32-Pin TQFP (H32- ...

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... PIN DESCRIPTION (NOTE: ML6430 and ML6431 pin functions are identical except for pin 16. See below) PIN NAME FUNCTION 1 P2/S This is a dual function pin. If presets DATA are enabled, refer to Table 7. If presets are disabled, serial bus data input. 2 P3/S This is a dual function pin. If presets CLK are enabled, refer to Table 7 ...

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... ML6430/ML6431 PIN DESCRIPTION (Continued) PIN NAME FUNCTION 23 H Horizontal reset; active low for one RESET half pixel Vertical blanking, active low BLANK 25 H Horizontal blanking, active low BLANK 26 C Composite sync output. May be either SYNC the raw output of sync slicer, or regenerated signal from internal pulse generators ...

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... C = 0.1µ CONDITIONS 4 Max programmed clock rates 0. – 0. ML6430/ML6431 = 0.1µF (Note 1). REF MIN TYP MAX UNITS 80 120 0.8 V – 0 1.0 µA 1.0 µ 0 ...

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... ML6430/ML6431 GENLOCK PERFORMANCE SPECIFICATIONS Unless otherwise noted See Figure 1 for parameter measurement definition PARAMETER SYNC SEPARATION Min Sync Amplitude Max Video Amplitude Clamp timing error Clamp Recovery TIme CLOCK RECOVERY Short Term Output Jitter Rejection RMS Residual Output Clock Jitter ...

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... PIN 28 t HSTCW BGATE PIN HBPC B CLAMP PIN 27 H RESET t HRW PIN 23 CONDITIONS ) ) Fast mode (Note 2) Slow mode (Note 2) ) HBPGW t HBPCW Figure 1. Line Rate Waveforms ML6430/ML6431 MIN TYP MAX UNITS 1.3 µs 0.6 µs 0.6 µs 1.3 µs 0.6 µs 5.0 µs 100 ns 250 ns 30 300 ns ...

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... SLEEP mode can only be enable/disabled via serial bus (Register 8). **The 54MHz clock input (pin 3) can be any 4 x Clock up to 70MHz Table 2. Summary of Register Differences between the ML6430 and ML6431. 8 has a few enhancements, (Center Frequency and Free Run Mode, see Table 1) and added functionality (see Table 2) ...

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... PAL color subcarrier crystal may be used. Alternately, a 14.318MHz NTSC or 17.7MHz PAL, 4xFs 3.58MHz or 4.43MHz oscillator source may be used. Regardless of the crystal used, the ML6430/ ML6431 can lock to PAL, NTSC, Beta or MII or YUV in either 625 or 525 standards. Table 4 provides the clock rate accuracy for both the NTSC and PAL clock rates for each crystal selected ...

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... Input or Any 4X Clock The 54MHz pin (pin input that clocks the horizontal and vertical counters. In this mode, the ML6430 or ML6431 is used as a pulse generator. The input signal at can be any 4X clock; for example, 54MHz (4 x CCIR clock rate of 13.5MHz), 49.09MHz (4 x Square Pixel clock rate of 12 ...

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... BEGINNING OF SECOND FIELD (ODD) 314 315 316 317 318 319 320 321 7 Lines (Second Field Vertical Interval Only) High for Second Field, Low for First Field Figure 3. PAL 625 Field Rate Waveforms ML6430/ML6431 277 278 279 ...

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... ML6430/ML6431 FUNCTIONAL DESCRIPTION FREERUN MODE Both the ML6430 and ML6431 can be used in Freerun mode. The ML6431 is recommended for applications requiring a more robust Freerun mode of operations. Figure 4 and Figure 4a describe the state diagrams for both the ML6430 and ML6431. Note that the ML6431 includes a faster path to go from FREERUN MODE #1 to FREERUN MODE #2 ...

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... OUTSIDE ±6% FOR > 2 FRAMES RANGE IF NO VIDEO FOR > 1 FRAME HORIZONTAL UNLOCKED NO SIGNAL PRESENT IF INPUT VIDEO FOR > 1 FRAME 4 TOGGLE FREERUN PIN "HIGH" ML6430/ML6431 TOGGLE FREERUN PIN FREERUN "HIGH" MODE #1 FREERUN PIN 5 "LOW" FREERUN PIN "LOW" TOGGLE FREERUN FREERUN PIN POWER UP MODE #2 " ...

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Resolution # Pixels Refresh Horizontal Pixel per Line Rate Frequency Frequency 640 x 480 800 60 Hz 31.5 KHz 25.175 MHz 832 72 Hz 37.9 KHz 31.500 MHz 840 75 Hz 37.5 KHz 31.500 MHz 800 x 600 1024 56 ...

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... FUNCTIONAL DESCRIPTION PRESET PIN CONTROL The ML6430/ML6431 may be controlled via a set of four preset mode pins. These pins do not allow access to all the programmable features of the ML6430/ML6431, but are intended to provide a simpler interface for most applications STD CLOCK RATE ...

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... SLEEP pin. All timing pulses are synchronous to the 54MHz clock (or other 4X clock). Serial Bus Control: To place the Ml6430/ML6431 in serial mode, take P0 (Preset ) to logical '0' or ground. The serial control system is written to by the external processor in 8- bit bytes. Each of these bytes is partitioned into an address (upper 4 bits of serial byte) and a data register (lower 4 bits of serial byte) ...

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... FUNCTIONAL DESCRIPTION Audio Clock: The Ml6430/ML6431 outputs a clock at 32kHz, 44.1kHz, or 48kHz. This clock is locked in frequency to the basic video clock regardless of the standard being used. With VCR head switches, the phase correction required to track the timing is removed from the audio clock by a patented circuit. This prevents the audio clock from being modulated by step changes in video timing ...

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... Low = narrow blanking High = wide blanking . Exception: 7-bit Horizontal Delay parameter. SYNC Values: –64p< Hdly < 63p 1/F Low = noise gating on High = noise gating off Table 10. ML6430 Register Map BIT CODE RANGE nom = ~011 0000 0000 ...

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... High = Power Down, Low = Normal 00 = 2.5 Pixels 01 = 2.5 Pixels High = Enabled, Low = Disabled High = Enabled, Low = Disabled 000 = NTSC Sq Pix 001 = PAL Sq Pix 010 = NTSC 601 High = Enabled, Low = Disabled Table 10. ML6430 Register Map (Continued) ML6430/ML6431 BIT CODE RANGE ...

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... ML6430/ML6431 REGISTER DATA DESCRIPTION BIT 0 0 PulsePol 0 C SYNC 0 1 PulsePol 1 H/V Blank Polarity 0 2 PulsePol 2 S/B Clamp Polarity 0 3 Clk 4X Select 4X Clock 1 0 Pixel0 Pix Counter Load Bit Pixel1 Pix Counter Load Bit Pixel2 Pix Counter Load Bit Pixel3 ...

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... Pixels 01 = 2.5 Pixels High = Enabled, Low = Disabled High = Enabled, Low = Disabled 000 = NTSC SqPix 001 = PAL Sq Pix 010 = NTSC 601 High = Enabled, Low = Disabled Table 11. ML6431 Register Map (Continued) ML6430/ML6431 BIT CODE RANGE 1.0 Pixels ...

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... Data Strobed into Appropriate Register: Clock Cycle 18 6. Stop indication: Clock Cycle 19 Register Addressing: Figure 6 shows the register map of the ML6430/6431. There are two basic parts of each received data byte: Address Nibble and Data Nibble 1. Address Nibble: The upper 4 bits of the data byte gives the register number in which to place the data ...

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... Figure 7. Typical Serial Bus Command Register Address Strobe in Address ML6430/ML6431 STROBE Ø DATA Final Clock strobes data into register DATA S : Second 4 bits are Register Data DATA S ...

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... ML6430/ML6431 APPLICATIONS The ML6430 and ML6431 can be used for a variety of applications. The following figures provide a basic setup for the various applications listed below: Figure 9: ML6430 or ML6431 in NTSC CCIR Applications Figure 10: ML6430 or ML6431 in PAL CCIR Applications Figure 11: ML6431 in VGA Application Figure 12: ML6430 or ML6431 in Audio Applications ...

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... SLEEP/54MHz 0.1 F 0.001 F GND VIN SYNC CV REF 1 SYNC Note 1. For minimum V *PHERROUT is only available with the ML6431 Figure 9. ML6430/ML6431 in NTSC CCIR Applications Programmed via Preset Pins 5V 1 OUT SYNCH 0 BLANK ...

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... ML6430/ML6431 5V SLEEP/54MHz +5V 0.1 F 0.001 F C VIN 1 Note 1. For minimum V *PHERROUT is only available with the ML6431 Figure 10. ML6430/ML6431 in PAL CCIR Applications Programmed via Preset Pins for 3.54 MHz XTAL or 1.0 F open for 4.43 MHz XTAL CV SYNCH 5V 0 P2/S DATA ...

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... ML6431 GND CLOCK/4X CLOCK CLOCK 17 8 FIELD 3.58MHz 400 410 or 4.43MHz 1nF 0 LED 5V LED 5V bypassing, connect capacitors V A only ML6430/ML6431 5V B 0.1 F 1nF PIXEL CLOCK OUTPUT A to GND A) 27 ...

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... ML6430/ML6431 S DATA P2/S S CLK SLEEP/54MHz 5V 0.1 F 0.001 F C VIN 1 Note 1. For minimum V Note 2. See Table 4 for audio clock frequencies and registers *PHERROUT is only available with the ML6431 Figure 12. ML6430/ML6431 in Audio Applications SYNCH 0 DATA 2 P3/S CLK ...

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... F 0.001 F GND VIN 1 1 INPUT NEEDED 75 Note 1. For minimum V Note 2. See Table 4 for audio clock frequencies and registers *PHERROUT is only available with the ML6431 Figure 13. ML6430/ML6431 in Pulse Generator Applications 5V 1 SYNCH 0 DATA 2 ...

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... ML6430/ML6431 NTSC AT SQUARE PIXEL RATE SYMBOL NAME: CCIR 601STD DESCRIPTION N Clocks per H: 640 HA Active N Clocks per H: 780 H Whole Line N H per Frame: 486 VA Active N H per Frame: 525 V Whole Line N Lines of Blanking: 16 VBLKW Wide N Lines of Blanking: 9 VBLKN Narrow t H Line Time 63 ...

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... B Clamp Width HBPCW –1.54 µ Blanking Pulse HBLK 11.03 µ Blanking Pulse HBLKW Width Table 12. Pulse Output Timing (Continued) ML6430/ML6431 CCIR 601STD TYP UNITS 922 922 cycles 1135.0064 1135 cycles 609, 616 lines 625 625 lines 15 lines 9 lines 64 ...

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... ML6430/ML6431 NTSC AT CCIR601 RATE SYMBOL NAME: CCIR 601STD DESCRIPTION N Clocks per H: 720 HA Active N Clocks per H: 858 H Whole Line N H per Frame: 486 VA Active N H per Frame: 525 V Whole Line N Lines of Blanking: 16 VBLKW Wide N Lines of Blanking: 9 VBLKN Narrow t H Line Time 63. Sync Time ...

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... MAX 0.012 - 0.018 (1.20 MAX) (0.29 - 0.45) 0.037 - 0.041 (0.95 - 1.05) TEMPERATURE RANGE 0°C to 70°C 0°C to 70° registered trademark of Micro Linear Corporation. All other trademarks are the ML6430/ML6431 0º - 8º 0.003 - 0.008 (0.09 - 0.20) 0.018 - 0.030 (0.45 - 0.75) SEATING PLANE PACKAGE 32-Pin TQFP (H32-7) 32-Pin TQFP (H32-7) ...