74LCX06 Fairchild Semiconductor, 74LCX06 Datasheet

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74LCX06

Manufacturer Part Number
74LCX06
Description
Low Voltage Hex Inverter/Buffer with Open Drain Outputs
Manufacturer
Fairchild Semiconductor
Datasheet

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74LCX06M
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74LCX06MTCX
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© 1999 Fairchild Semiconductor Corporation
74LCX06M
74LCX06SJ
74LCX06MTC
74LCX06
Low Voltage Hex Inverter/Buffer with Open Drain Outputs
General Description
The LCX06 contains six inverters/buffers. The inputs toler-
ate voltages up to 7V allowing the interface of 5V systems
to 3V systems.
The outputs of the LCX06 are open drain and can be con-
nected to other open drain outputs to implement active
LOW wire AND or active HIGH wire OR functions.
The 74LCX06 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
Package Number
MTC14
IEEE/IEC
M14D
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
A
O
n
n
Pin Names
DS500237
Features
Connection Diagram
Inputs
Outputs
5V tolerant inputs
2.3V–3.6V V
3.7 ns t
Power down high impedance inputs and outputs
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
Functionally compatible with 74 series 05
ESD performance:
24 mA output drive (V
Description
Package Description
Human body model
Machine model
PD
max (V
CC
specifications provided
CC
3.3V), 10 A I
200V
CC
2000V
3.0V)
October 1999
Revised October 1999
CC
www.fairchildsemi.com
max

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74LCX06 Summary of contents

Page 1

... The outputs of the LCX06 are open drain and can be con- nected to other open drain outputs to implement active LOW wire AND or active HIGH wire OR functions. The 74LCX06 is fabricated with advanced CMOS technol- ogy to achieve high speed operation while maintaining CMOS low power dissipation. ...

Page 2

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 3

AC Electrical Characteristics Symbol Parameter t Propagation Delay Time PZL t PLZ Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification ...

Page 4

AC Loading and Waveforms (C Test t PLH t PZL t PZH 3-STATE Output High Enable and Disable TImes for Logic (Input Pulse Characteristics 1MHz, t Symbol 3. ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14A Package Number M14D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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