AT24C1024-10UI-2.7 ATMEL Corporation, AT24C1024-10UI-2.7 Datasheet

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AT24C1024-10UI-2.7

Manufacturer Part Number
AT24C1024-10UI-2.7
Description
2-wire Serial EEPROM 1M (131/072 x 8)
Manufacturer
ATMEL Corporation
Datasheet
Features
Description
The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program-
mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The
device’s cascadable feature allows up to 2 devices to share a common 2-wire bus. The
device is optimized for use in many industrial and commercial applications where low-
power and low-voltage operation are essential. The devices are available in space-
saving 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead Leadless Array (LAP) and 8-ball dBGA
packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) versions.
Pin Configurations
Pin Name
SDA
SCL
WP
NC
A1
Low-voltage Operation
Internally Organized 131,072 x 8
2-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
400 kHz (2.7V) and 1 MHz (5V) Clock Rate
Write Protect Pin for Hardware and Software Data Protection
256-byte Page Write Mode (Partial Page Writes Allowed)
Random and Sequential Read Modes
Self-timed Write Cycle (5 ms Typical)
High Reliability
8-lead PDIP, 8-lead EIAJ SOIC, 8-lead LAP and 8-ball dBGA
– 2.7 (V
– Endurance: 100,000 Write Cycles/Page
– Data Retention: 40 Years
GND
NC
NC
A1
CC
8-lead SOIC
1
2
3
4
= 2.7V to 5.5V)
Function
Address Input
Serial Data
Serial Clock Input
Write Protect
No Connect
8
7
6
5
VCC
WP
SCL
SDA
GND
8-lead Leadless Array
VCC
SDA
SCL
NC
NC
WP
A1
VCC
SDA
SCL
WP
Bottom View
Bottom View
8-lead PDIP
8-ball dBGA
8
7
6
5
1
2
3
4
8
7
6
5
TM
Packages
1
2
3
4
8
7
6
5
1
2
3
4
NC
A1
NC
GND
NC
A1
NC
GND
VCC
WP
SCL
SDA
2-wire Serial
EEPROM
1M (131,072 x 8)
AT24C1024
Rev. 1471H–SEEPR–03/03
1

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AT24C1024-10UI-2.7 Summary of contents

Page 1

... PDIP, 8-lead EIAJ SOIC, 8-lead LAP and 8-ball dBGA Description The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program- mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low- power and low-voltage operation are essential ...

Page 2

... Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Block Diagram AT24C1024 2 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...

Page 3

... If left unconnected internally pulled down to GND. Switching Memory AT24C1024, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of 256 bytes each. Random word addressing requires a 17-bit data word address. Organization 1471H–SEEPR–03/03 prior to a write operation creates a software write-protect function. ...

Page 4

... Input Low Level IL (1) V Input High Level IH V Output Low Level OL Note min and V max are reference only and are not tested AT24C1024 4 = 25° 1.0 MHz -40°C to +85° Test Condition V = 5.0V READ at 400 kHz 5.0V WRITE at 400 kHz ...

Page 5

... V ≤ 5.5V CC (1) 2.7V ≤ V ≤ 5.5V CC 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ 5.5V CC 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ 5.5V CC 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ 5.5V CC 4.5V ≤ V ≤ 5.5V CC 2.7V ≤ V ≤ AT24C1024 = +2.7V to +5.5V 100 pF (unless CC L Min Max Units 1000 400 0.4 1.3 0.4 0.6 0.05 0.55 0.05 0.9 0.5 1.3 0.25 0.6 0.25 0.6 0 100 0.3 100 300 0.25 0 100K Write Cycles kHz µ ...

Page 6

... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C1024 features a low-power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations ...

Page 7

... Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) Note: 1. The write cycle time t is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. WR 1471H–SEEPR–03/03 AT24C1024 (1) 7 ...

Page 8

... Data Validity Start and Stop Definition Output Acknowledge AT24C1024 8 1471H–SEEPR–03/03 ...

Page 9

... Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C1024 has a hardware data protection scheme that allows the user to write-protect the entire memory when the WP pin Write BYTE WRITE: To select a data word in the 1024K memory requires a 17-bit word address ...

Page 10

... The sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (refer to Figure 6). AT24C1024 10 1471H–SEEPR–03/03 ...

Page 11

... Figure 1. Device Address Figure 2. Byte Write Figure 3. Page Write P 0 Figure 4. Current Address Read 1471H–SEEPR–03/03 0 MOST LEAST SIGNIFICANT SIGNIFICANT P 0 MOST LEAST SIGNIFICANT SIGNIFICANT AT24C1024 11 ...

Page 12

... Figure 5. Random Read Figure 6. Sequential Read AT24C1024 1471H–SEEPR–03/03 ...

Page 13

... Ordering Information Ordering Code AT24C1024-10CI-2.7 AT24C1024C1-10CI-2.7 AT24C1024-10PI-2.7 AT24C1024W-10SI-2.7 AT24C1024-10UI-2.7 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics tables. 8CN3 8-lead, 0.230" Wide, Leadless Array Package (LAP) 8CN1 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8P3 8-lead, 0.300" Wide, Plastic Dual In-line Package (PDIP) 8S2 8-lead, 0.200" ...

Page 14

... Marked Pin1 Indentifier E Top View 0.10 mm TYP Bottom View Note: 1. Metal Pad Dimensions. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024 14 D Side View Pin1 Corner TITLE 8CN3, 8-lead 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) A ...

Page 15

... Note: 1. Metal Pad Dimensions. 2325 Orchard Parkway San Jose, CA 95131 R 1471H–SEEPR–03/03 D Side View Pin1 Corner TITLE 8CN1, 8-lead ( 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) AT24C1024 A A1 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 0.94 1.04 1.14 A1 0.30 0.34 0.38 b ...

Page 16

... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024 ...

Page 17

... Values b,C apply to pb/Sn solder plated terminal. The standard thickness of the solder layer shall be 0.010 +0.010/-0.005 mm. 2325 Orchard Parkway San Jose, CA 95131 R 1471H–SEEPR–03/ SYMBOL TITLE 8S2, 8-lead, 0.209" Body, Plastic Small Outline Package (EIAJ) AT24C1024 COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX NOM NOTE A 1.78 2.03 A1 ...

Page 18

... AT24C1024 Ø Side View TITLE 8U8, 8-ball 0.75 pitch, Die Ball Grid Array Package (dBGA) AT24C1024 (AT35520) COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM NOTE D 3.84 D1 0.80 TYP E 2.85 E1 1.05 TYP e 0.75 TYP d 0.75 TYP A 0.90 REF A1 0.49 0.52 0.55 A2 ...

Page 19

... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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