LH28F004SU-LC Sharp Electrionic Components, LH28F004SU-LC Datasheet
LH28F004SU-LC
Related parts for LH28F004SU-LC
LH28F004SU-LC Summary of contents
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... LH28F004SU-LC FEATURES • 512K × 8 Word Configuration • Write/Erase Operation ( 3 – No Requirement for DC/DC Converter to Write/Erase • 120 ns Maximum Access Time (V = 3.3 V ± 0 • Min. 2.7 V Read Capability – 160 ns Maximum Access Time ( • 32 Independently Lockable Blocks • ...
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... LH28F004SU-LC OUTPUT MULTIPLEXER INPUT BUFFER Y-DECODER ADDRESS X-DECODER QUEUE LATCHES ADDRESS COUNTER Figure 2. LH28F004SU-LC Block Diagram OUTPUT BUFFER DATA ID QUEUE REGISTER REGISTERS CSR REGISTER ESRs DATA COMPARATOR Y GATING/SENSING . . . . . . 4M (512K × 8) Flash Memory INPUT BUFFER I/O LOGIC CE OE CUI ...
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... NAME AND FUNCTION » must be low to select the device. » low, the device is reset, any current operation is » pin is turned to low in order to return the device to default configuration. When » is high. LH28F004SU-LC » is required to stay low in » goes low, » » pin is floated. ...
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... Dedicated Block Write/Erase Protection • Command-Controlled Memory Protection Set/Reset Capability The LH28F004SU-LC will be available in a 40-pin, 1.2 mm thick × × TSOP (Type I) pack- age. This form factor and pinout allow for very high board layout densities Command User Interface (CUI) serves as the system Interface between the microprocessor or microcontroller and the internal memory operation ...
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... The LH28F004SU-LC contains a Compatible Status Register (CSR) which is 100% compatible with the LH28F008SA Flash memory’s Status Register. This register, when used alone, provides a straightforward upgrade capability to the LH28F004SU-LC from a LH28F008SA-based design. The LH28F004SU-LC incorporates an open drain » » ...
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... LH28F004SU-LC BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS Bus Operations MODE RP » CE » Read Output Disable Standby Deep Power-Down Manufacturer Device Write NOTES can for address or control pins except for RY ...
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... Resume command (D0H) after completed next Erase command. Beside, when the Erase Suspend command is issued, while the device is not in Erase, be sure to issue Resume command (D0H) after the next erase complete. LH28F004SU-LC Performance Enhancement Command Bus Definitions FIRST BUS CYCLE COMMAND MODE OPER ...
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... LH28F004SU-LC Compatible Status Register WSMS ESS CSR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy CSR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase in Progress/Completed CSR.5 = ERASE STATUS (ES Error in Block Erasure 0 = Successful Block Erase CSR.4 = DATA-WRITE STATUS (DWS Error in Data Write 0 = Data Write Successful CSR ...
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... See Command Bus Cycle notes for description of codes. BUS COMMAND OPERATION Standby Check CSR. Data Write Unsuccessful 0 = Data Write Successful Check CSR.3 Standby CSR. should be cleared, if set, before further attempts are initiated. LH28F004SU-LC COMMENTS COMMENTS Low Detect OK 28F004SUT-LC12-4 9 ...
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... LH28F004SU-LC START WRITE 20H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER NO 0 SUSPEND CSR.7 = ERASE 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 ERASE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD ...
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... WSM Busy Standby Check CSR Erase Suspended 0 = Erase Completed Write Read D = FFH Array Read Read must be from block other than the one suspended. Write Erase D = D0H Resume See Command Bus Cycle notes for description of codes. LH28F004SU-LC COMMENTS 28F004SUT-LC12-6 11 ...
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... LH28F004SU-LC START READ COMPATIBLE STATUS REGISTER 0 CSR RESET WP READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 77H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. LOCK YES ANOTHER BLOCK NO SET WP OPERATION COMPLETE 12 BUS COMMAND OPERATION Read Write Reset ...
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... Use Block-Erase flowchart. Erasing a block clears any previously established lockout for that block. 3. Use Set-Write-Protect flowchart. This step re-implements protection to locked blocks. 4. Use Word/Byte-Write or 2-Byte-Write flowchart sequences to write data. 5. Use Block-Lock flowchart to write lock bit if desired. Figure 8. Updating Data in a Locked Block LH28F004SU-LC START RESET WP (NOTE 1) WRITE MORE ...
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... LH28F004SU-LC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE FBH WRITE DATA/A 10 WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. ANOTHER YES 2-BYTE WRITE NO OPERATION COMPLETE Figure 9. Two-Byte SerialWrites with Compatible Status Registers (LH28F004SU (512K × 8) Flash Memory BUS ...
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... Write FFH after the last operation to reset device to read array mode. See Command Bus Cycle notes for description of codes. BUS OPERATION Standby Standby CSR. should be cleared, if set, before further attempts are initiated. LH28F004SU-LC COMMAND COMMENTS Erase All D = A7H Unlocked Blocks D = D0H ...
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... LH28F004SU-LC START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 57H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) CSR. OPERATION COMPLETE 16 BUS COMMAND OPERATION Read Write Set Write Protect Set Confirm Write Read Read NOTE: If CSR. set command sequence error, should be cleared before further attempts are initiated ...
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... Reset Write Protect command enables Write/Erase operation to all blocks. Write FFH after the last operation to reset device to Read Array Mode. See Command Bus Cycle notes for description of codes. Figure 12. Reset Write Protect LH28F004SU-LC COMMENTS Check CSR WSM Ready 0 = WSM Busy D = 47H ...
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... LH28F004SU-LC ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings* Temperature under bias ......................... 0°C to +70°C Storage temperature ......................... -65°C to +125° 3.3 V ±0.3 V Systems CC SYMBOL PARAMETER T Operating Temperature, Commercial with Respect to GND Supply Voltage with Respect to GND PP PP Voltage on any Pin (Except V ...
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... PIN STATES H High L Low V Valid X Driven, but not necessarily valid Z High Impedance 1.5 OUTPUT FROM OUTPUT UNDER TEST 28F004SUT-LC12-13 Figure 14. Transient Equivalent Testing = 3.3 V) LH28F004SU-LC 2 TRANSMISSION LINE TEST POINT TOTAL CAPACITANCE = 50 pF 28F004SUT-LC12-14 Load Circuit ( ...
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... LH28F004SU-LC DC Characteristics V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER I Input Load Current IL I Output Leakage Current Standby Current CCS CC V Deep Power-Down CC I CCD Current Read Current CCR Read Current CCR Write Current CCW ...
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... 25°C. These currents are valid for all less than Static operation. CCR » (MAX < GND + 0.2 V. PPL LH28F004SU-LC TEST CONDITIONS NOTE V > Byte/Two-Byte PP PPH Serial Write in Progress PPH ...
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... LH28F004SU-LC AC Characteristics - Read Only Operations V = 3.3 V ± 0 0°C to +70° SYMBOL PARAMETER t Read Cycle Time AVAV » t Address Setup to OE Going Low AVGL t Address to Output Delay AVQV » Output Delay ELQV » High to Output Delay PHQV » ...
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... HIGH-Z OH DATA (D/ 5 GND ( DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV t AVGL t GLQV t ELQV t GLQX t ELQX t AVQV t PHQV Figure 15. Read Timing Waveforms LH28F004SU- DATA VALID STANDBY . . . POWER-DOWN . . . . . . t EHQZ . . . t GHQZ . . . HIGH-Z VALID OUTPUT . . . 28F004SUT-LC12-15 23 ...
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... LH28F004SU-LC POWER-UP AND RESET TIMINGS V POWER ( ADDRESS (A) DATA (Q) Figure 16. V SYMBOL PARAMETER » Low 3.0 V MIN. PL3V CC t Address Valid to Data Valid for V AVQV » High to Data Valid for V PHQV NOTES: CE » ...
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... MIN. MAX. UNITS 120 ns 100 480 ns 10 110 110 110 100 µ 0.3 » for all Command Write operations. LH28F004SU-LC 1 NOTE µs ns µ ...
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... LH28F004SU-LC WRITE DATA-WRITE DEEP OR ERASE SETUP COMMAND POWER-DOWN V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( WHEH t ELWL ( ( WLWH V HIGH-Z IH DATA (D/ PHWL V OH RY/BY ( (P) ...
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... Address and Data are latched on the rising edge of CE TYP. MIN. 120 480 100 0 110 110 110 » Going Low 0.3 » for all Command Write operations. LH28F004SU-LC 1 MAX. UNITS NOTE 100 µ ...
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... LH28F004SU-LC WRITE DATA-WRITE DEEP OR ERASE POWER-DOWN SETUP COMMAND V ADDRESSES (A) IH (NOTE AVAV V ADDRESSES (A) IH (NOTE AVAV ( EHWH t WLEL ( ( ELEH V HIGH-Z IH DATA (D/ PHEL V OH RY/BY ( (P) ...
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... Block Erase Time (16KB) Full Chip Erase Time NOTES: 1. 25° 5 Excludes System-Level Overhead. 3. Depends on the number of protected blocks. (1) TYP. MIN. MAX. UNITS 20 µs 30 µs 0.33 1.3 s 0.26 1.0 s 0.8 1 19.2 s LH28F004SU-LC TEST CONDITIONS NOTE 2 2 Byte Write Mode 2 Two-Byte Serial Write Mode ...
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... LH28F004SU-LC 40TSOP (TSOP040-P-1020 SEE DETAIL 18.60 [0.732] 18.20 [0.717] 19.30 [0.760] 18.70 [0.736] 20.30 [0.799] 19.70 [0.776] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F004SU T Device Type Package Speed Example: LH28F004SUT-LC15 (4M (512K x 8) Flash Memory, 150 ns, 40-pin TSOP) 30 LC## 12 120 Access Time (ns) 15 150 40-pin, 1 ...
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... EUROPE SHARP Electronics (Europe) GmbH Microelectronics Division Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Telex: 2161867 (HEEG D) Facsimile: (49) 40 2376-2232 LH28F004SU-LC ASIA SHARP Corporation Integrated Circuits Group 2613-1 Ichinomoto-Cho Tenri-City, Nara, 632, Japan Phone: (07436) 5-1321 Telex: LABOMETA-B J63428 Facsimile: (07436) 5-1532 ...