LM95010CIMM National Semiconductor, LM95010CIMM Datasheet - Page 12

• Manufacturer Part Number: LM95010CIMM
• Description: Digital Temperature Sensor with SensorPath Bus in MSOP8 Package
• Manufacturer: National Semiconductor

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- 111 111
-011 111
000 000
000 001 Manufacturer
000 010 Device ID
000 100 Device
000 101 Device
001 000 Temperature
001 001 Temperature
001 010 Temperature
100 000 Conversion
100 001
000 011 Capabilities
001 011
1.0 Functional Description
1. A bus error event occurred, and
2. the "physical" condition for an Attention Request is met
3. At the first time 2. is met after 1 occurred, there has not
All devices (master or slave) must monitor the bus for an
Attention Request signal. The following notes clarify the
intended system operation that uses the Attention Request
Indication.
2.0 Register Set
2.1 REGISTER SET SUMMARY
• Masters are expected to use the attention request as a
• After an Attention Request is sent by an LM95010 until
Add
Reg
trigger to read results from the LM95010. This is done in
a sequence that covers all LM95010s. This sequence is
referred to as "master sensor read sequence".
after the next read from the Device Status register the
LM95010 does not send Attention Requests for a function
event since it is guaranteed that the master will read the
Status register as part of the master sensor read se-
quence. Note that the LM95010 will send an attention for
BER, regardless of the Status register read, to help the
master with any error recovery operations and prevent
deadlocks.
(i.e., the bus is inactive), and
been a Bus Reset.
Register
Name
Device
Number
ID
Fixed
Status
Control
Capabilities
Data
Readout
Control
Reserved
Rate
Undefined
Registers
R/
W
R/
W
R/
W
R/
W
R
R 100Bh
R
R
R
R 014Ah
R
R
R
21h
Val
1h
0h
0h
0h
2h
O
R
P
*
MSb
MSb
Sign
Bit
15
0
0
0
0
0
0
64˚C 32˚C 16˚C 8˚C 4˚C 2˚C 1˚C
Bit
14
0
0
0
0
0
0
RevID
(Continued)
Bit
13
0
0
0
0
0
0
Reserved
Not Available
Not Available
Not Available
Bit
12
1
0
0
0
0
0
Bit
11
0
0
0
0
0
0
Reserved
12
Reserved
Bit
10
0
0
0
0
0
0
• A master must record the Attention Request event. It
Note: there is no indication of which slave has sent the
request. The requirement that multiple requests are not sent
allows the master to know within one scan of register reads
that there are no more pending events.
1.3.6 Fixed Number Setting
The LM95010 device number is defined by strapping of the
ADD0 and ADD1 pins. The LM95010 will wake (after Device
Reset) with the Device Number field of the Device Number
register set to the address as designated in Section 1.1.1
Device Number. It is the responsibility of the system de-
signer to avoid having two devices with the same Device
Number on the bus.
Devices should be detected by the master by a read opera-
tion of the Device Number register. The read returns "000" if
there is no device at that address on the bus (the EP bit must
be ignored).
must then scan all slave devices in the system by reading
their Device Status register and must handle any pending
event in them before it may assume that there are no
more events to handle.
Reserved
Bit
9
0
0
0
0
0
0
Sens
Undefined
Undefined
Bit
Int
8
0
0
0
0
1
0
Rout
BER
Size
Bit
0.5
˚C
7
0
0
0
0
0
0
0
0
Sign
0.25
LSb
Bit
˚C
6
0
0
0
0
0
0
1
0
0
Reserved
Device ID
Bit
5
0
0
1
0
0 ERF1
0
0
0
0
0
EnF1 Res Low
10Bits
Bit
4
0
0
0
0
0
0
0
0
Reserved
Bit
3
0
1
0
0
0
0
1
0
0
0
Function 1
Pwr
Bit
2
0
0
0
0
0
0
0
0 Conversion
See Table 1
Resolution
0.25˚C
down
Shut
EN0 ATE
Bit
1
1
0
0
0
1
0
Rate
Reset
LSb
SF1
Bit
0
1
1
1
0
0