HCS20D Intersil Corporation, HCS20D Datasheet

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HCS20D

Manufacturer Part Number
HCS20D
Description
Radiation Hardened Dual 4-Input NAND Gate
Manufacturer
Intersil Corporation
Datasheet
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
• Input Current Levels Ii
Description
The Intersil HCS20MS is a Radiation Hardened Dual 4-Input
NAND Gate. A low on any input forces the output to a High state.
The HCS20MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS20MS is supplied in a 14 lead Ceramic flatpack (K suffix)
or a SBDIP Package (D suffix).
Ordering Information
HCS20DMSR
HCS20KMSR
HCS20D/
Sample
HCS20K/
Sample
HCS20HMSR
(Typ)
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
NUMBER
PART
TEMPERATURE
-55
-55
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
o
o
o
C
C
C
RAD (Si)/s 20ns Pulse
5 A at VOL, VOH
o
o
C
C
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
SCREENING
12
o
LEVEL
C to +125
RAD (Si)/s
o
-9
C
14 Lead SBDIP
14 Lead Ceramic
Flatpack
14 Lead SBDIP
14 Lead Ceramic
Flatpack
Die
2
/mg
Errors/Bit-Day
PACKAGE
43
Pinouts
Functional Diagram
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-183S CDFP3-F14, LEAD FINISH C
GND
(2, 10)
(4, 12)
(5, 13)
NC
(1, 9)
A1
B1
C1
D1
Y1
An
An
Bn
Cn
Dn
H
L
X
X
X
MIL-STD-183S CDIP2-T14, LEAD FINISH C
HCS20MS
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
Bn
H
X
X
X
L
GND
INPUTS
NC
A1
B1
C1
D1
Y1
Dual 4-Input NAND Gate
1
2
3
4
5
6
7
TRUTH TABLE
1
2
3
4
5
6
7
Cn
X
X
X
H
L
TOP VIEW
TOP VIEW
Radiation Hardened
Dn
X
X
X
H
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
11
10
9
8
VCC
D2
C2
NC
B2
A2
Y2
OUTPUTS
Yn
H
H
H
H
L
518761
(6, 8)
3050.1
Yn
VCC
D2
C2
NC
B2
A2
Y2

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HCS20D Summary of contents

Page 1

... HCS20DMSR - +125 C Intersil Class S Equivalent o o HCS20KMSR - +125 C Intersil Class S Equivalent o HCS20D/ +25 C Sample Sample o HCS20K/ +25 C Sample Sample o HCS20HMSR +25 C Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 ...

Page 2

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage ...

Page 3

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Data to Output TPHL VCC = 4.5V Data to Output TPLH VCC = 4.5V NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 , CL = ...

Page 4

TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL Noise Immunity FN VCC = 4.5V, VIH = 0.70(VCC), Functional Test VIL = 0.30(VCC), (Note 3) Input to Yn TPHL VCC = 4.5V TPLH VCC = 4.5V NOTES: 1. ...

Page 5

CONFORMANCE GROUPS METHOD Group E Subgroup 2 5005 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OPEN GROUND STATIC BURN-IN I TEST CONDITIONS (Note ...

Page 6

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 7

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

Page 8

Die Characteristics DIE DIMENSIONS mils 2.20mm x 2.24mm METALLIZATION: Type: AlSi Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY <2 A/cm BOND ...

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