T89C51CC02 Atmel, T89C51CC02 Datasheet - Page 87
T89C51CC02
Manufacturer Part Number
T89C51CC02
Description
8-Bit MCU
Manufacturer
Atmel
Datasheet
1.T89C51CC02.pdf
(137 pages)
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CANBT1 (S:B4h)
CAN Bit Timing Registers 1
Note:
The CAN controller bit timing registers must be accessed only if the CAN controller is disabled with the ENA bit of the CANGCON register set to 0.
See Figure 60.
No default value after reset.
Rev.A - May 17, 2001
Bit Number Bit Mnemonic
6-1
7
7
0
-
BRP 5
BRP5:0
6
-
-
Reserved
Baud rate prescaler
Reserved
BRP 4
The value read from this bit is indeterminate. Do not set this bit.
The period of the CAN controller system clock Tscl is programmable and determines the individual
bit timing.
The value read from this bit is indeterminate. Do not set this bit.
5
Figure 74. CANBT1 Register
Preliminary
BRP 3
4
BRP 2
Tscl
3
Description
=
BRP 5
-------------------------------------- -
Fcan
BRP 1
2
0
T89C51CC02
+
1
BRP 0
1
0
-
87
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