MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 274
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MC9S08GB32
Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC9S08GB32.pdf
(290 pages)
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Appendix A Electrical Characteristics
1
2
3
4
A.9.2
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
274
This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to
override reset requests from internal sources.
When any reset is initiated, internal circuitry drives the reset pin low for about 34 cycles of f
on the reset pin about 38 cycles later to distinguish external reset requests from internal requests.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
Timer/PWM (TPM) Module Timing
RESET PIN
Figure A-12. Active Background Debug Mode Latch Timing
BKGD/MS
RESET
DD
IRQ
and 80% V
MC9S08GB/GT Data Sheet, Rev. 2.3
Figure A-11. Reset Timing
Figure A-13. IRQ Timing
t
MSSU
DD
levels. Temperature range –40°C to 85°C.
t
ILIH
t
extrst
t
MSH
Self_reset
and then samples the level
Freescale Semiconductor
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