SP310E Sipex, SP310E Datasheet - Page 8

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SP310E

Manufacturer Part Number
SP310E
Description
High-Performance RS-232 Line Drivers/Receivers
Manufacturer
Sipex
Datasheet

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Table 1. Wake-up Function Truth Table.
SP310E transmitter and receiver outputs in a high
impedance condition (tri-stated). The shutdown
mode is controlled on the SP312E by a logic “0”
on the SHUTDOWN control line (pin 18); this also
puts the transmitter outputs in a tri–state mode.
The receiver outputs can be tri–stated separately
during normal operation or shutdown by a logic
“1” on the ENABLE line (pin 1).
Wake–Up Feature for the SP312E
The SP312E has a wake–up feature that keeps
all the receivers in an enabled state when the
device is in the shutdown mode. Table 1 defines
the truth table for the wake–up function.
With only the receivers activated, the SP312E
typically draws less than 5µA supply current.
In the case of a modem interfaced to a computer
in power down mode, the Ring Indicator (RI)
signal from the modem would be used to "wake
up" the computer, allowing it to accept data
transmission.
After the ring indicator signal has propagated
through the SP312E receiver, it can be used to
trigger the power management circuitry of the
computer to power up the microprocessor, and
bring the SD pin of the SP312E to a logic high,
taking it out of the shutdown mode. The receiver
propagation delay is typically 1µs. The enable
time for V
V
be sent back to the modem on the data terminal
ready (DTR) pin signifying that the computer is
ready to accept and transmit data.
Date: 7/19/04
SD
0
0
1
1
have settled to their final values, a signal can
EN
+
0
1
0
1
and V
Up/Down
is typically 2ms. After V
Power
Down
Down
Up
Up
Receiver
SP202E Series High Performance RS232 Transceivers
Outputs
Tri–state
Tri–state
Enable
Enable
+
and
8
Pin Strapping for the SP233ECT
The SP233E packaged in the 20–pin SOIC pack-
age (SP233ECT) has a slightly different pinout
than the SP233E in other package configurations.
To operate properly, the following pairs of pins
must be externally wired together:
All other connections, features, functions and
performance are identical to the SP233E as
specified elsewhere in this data sheet.
ESD TOLERANCE
The SP202E/232E/233E/310E/312E devices
incorporates ruggedized ESD cells on all driver
output and receiver input pins. The ESD struc-
ture is improved over our previous family for
more rugged applications and environments sen-
sitive to electro-static discharges and associated
transients. The improved ESD tolerance is at
least ±15KV without damage nor latch-up.
There are different methods of ESD testing
applied:
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit.
simulation is performed by using a test model as
shown in Figure 9. This method will test the IC’s
capability to withstand an ESD transient during
normal handling such as in manufacturing areas
where the ICs tend to be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
the two V– pins (pins 10 and 17)
the two C
the two C
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
2
2
+ pins (pins 12 and 15)
– pins (pins 11 and 16)
© Copyright 2004 Sipex Corporation
The

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